SAA7130 データシートの表示（PDF） - Philips Electronics
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SAA7130 Datasheet PDF : 46 Pages
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Philips Semiconductors
SAA7130HL
PCI video broadcast decoder
Table 7:
Symbol
TRST_N
TCK
TMS
TDO
TDI
JTAG test interface pins
Pin
Type Description
121
I
test reset input: drive LOW for normal operating (active
LOW)
122
I
test clock input: drive LOW for normal operating
123
I
test mode select input: tie HIGH or let float for normal
operating
124
O
test serial data output: 3-state
125
I
test serial data input: tie HIGH or let float for normal
operating
Table 8: I2C-bus multi-master interface
Symbol
Pin
Type Description
SCL
90
IO2
serial clock input (slave mode) or output (multi-master
mode)
SDA
91
IO2
serial data input and output; always available
PROP_RST_N 105
GO
propagate reset and D3-hot output; to peripheral board
circuitry
Table 9:
Symbol
GPIO27
GPIO26
GPIO25
V_CLK
GPIO23
GPIO pins and functions [1]
Pin
Type Function
Audio and
video port
outputs
87
GIO
-
88
GIO
-
89
GIO
-
66
GO
V_CLK (also
gated)
56
GIO
HSYNC
GPIO22
57
GIO
VSYNC
GPIO21
58
GPIO20
59
GPIO19
60
GPIO18
61
GPIO17
67
GIO
-
GIO
-
GIO
-
GIO
VAUX2
GIO
VAUX1 (e.g.
VACTIVE)
TS capture
inputs
Raw DTV/DVB GPIO
outputs
-
-
R/W
-
-
R/W
-
-
R/W
-
ADC_CLK (out) -
-
ADC_C[0] (LSB) R/W,
INT
TS_LOCK
-
(channel
decoder locked)
R/W,
INT
TS_S_D
-
R/W
(bit-serial data)
TS_CLK
-
R/W
(< 33 MHz)
TS_SOP (packet -
R/W
start)
-
X_CLK_IN
R/W,
INT
-
ADC_Y[0] (LSB) R/W
SAA7130HL_4
Product data sheet
Rev. 04 — 11 April 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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