SAA7240 データシートの表示（PDF） - Philips Electronics

部品番号

コンポーネント説明

メーカー

SAA7240

MPEG-2 Transport RISC processor

Philips Electronics 

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...

SYMBOL

PIN TYPE

DESCRIPTION

BUFFER TYPE

RESET

STATE

GP/HS interface (1 parallel port or 2 serial ports)

GPDATA[0:7]

GPSYNC

GPVALID

GPSTROBE

174 to 166 I/O GP/HS data bus

176

I/O GP/HS synchronization

175

I/O GP/HS valid

177

I/O GP/HS strobe

bidirectional; CMOS input;

Z

2 mA output drive

bidirectional; CMOS input;

Z

2 mA output drive

bidirectional; CMOS input;

Z

2 mA output drive

bidirectional; CMOS input;

Z

2 mA output drive

Audio/video interface

AVD0/STRAP0

103

AVD1/STRAP1

102

AVD2/STRAP2

101

AVD3/STRAP3

100

AVD4/BIG

99

AVD5/BOOTCS0

98

AVD6/BOOTW1

97

AVD7/BOOTW0

96

A_STROBE

94

V_STROBE

93

AV_ERROR

95

I/O MPEG audio/video data stream output port 0; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video data stream output port 1; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video data stream output port 2; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video data stream output port 3; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video data stream output port 4; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video data stream output port 5; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video stream data output port 6; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

I/O MPEG audio/video stream data output port 7; latched in bidirectional; CMOS input;

Z

PIO_STRAP register during reset

3-state output; 2 mA output drive

O audio data strobe in the AVD stream

2 mA output drive

LOW

O video data strobe in the AVD stream

2 mA output drive

LOW

O flag for bit stream error (active HIGH)

2 mA output drive

LOW

Share Link: