SAA7274 データシートの表示（PDF） - Philips Electronics
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SAA7274 Datasheet PDF : 16 Pages
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Philips Semiconductors
Audio Digital Input Circuit (ADIC)
Product specification
SAA7274
AC CHARACTERISTICS
VDD = 4.5 to 5.5 V.
Tamb = −40 to +70 °C.
Load capacitance (CL): OSCL = 50 pF; OWSY, ODCL and OSDA = 30 pF (see application note);
all other outputs = 20 pF.
Clock frequency fIOSCL = ≤ 12.5 MHz.
IOSCL timing pulse LOW, tLOW ≥ 37 ns; rise and fall times tr and tf = ≤ 10 ns.
Delay times are specified from clock input = 50% VDD to output = 50% VDD; unless otherwise specified
PARAMETER
CONDITIONS
SYMBOL MIN.
TYP.
MAX.
Set-up and hold times
IWSEL to IDACL
see Fig.5
Data set-up time
Data hold time
tSU
1
−
−
tHD
−
−
1
Propagation delays
IOSCL to OSCL
IDACL to OSDA
OSCL to OWSY and ODCL
tp
−
−
25
tp
−
−
60
tp
5
−
50
Rise and fall times
OSCL
Rise and fall time
Rise and fall time
OWSY and ODCL
TTL levels = 0.4 to 2 V
tr, tf
−
−
10
CMOS levels = 10 to 90% VDD tr, tf
−
−
15
Rise and fall time
Rise and fall time
TTL levels = 0.4 to 2 V
tr, tf
−
−
15
CMOS levels = 10 to 90% VDD tr, tf
−
−
25
Note
1. Clock periods of OSCL.
UNIT
note 1
note 1
ns
ns
ns
ns
ns
ns
ns
July 1991
Fig.5 Set-up and hold time diagram.
11
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