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Q67100-H6486 データシートの表示(PDF) - Infineon Technologies

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Q67100-H6486
Infineon
Infineon Technologies Infineon
Q67100-H6486 Datasheet PDF : 126 Pages
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High-Level Serial
Communications Controller Extended
(HSCX)
Preliminary Data
1 Features
Serial Interface
Two independent full-duplex HDLC channels
(SAB 82526: one channel)
On chip clock generation or external clock source
On chip DPLL for clock recovery for each channel
Two independent baudrate generators
(SAB 82526: one baudrate generator)
– Independent time-slot assignment for each channel
with programmable time-slot length (1-256 bit)
Different modes of data encoding
Modem control lines (RTS, CTS, CD)
Support of bus configuration by collision resolution
Programmable bit inversion
Transparent receive/transmit of data bytes
without HDLC framing
Continuous transmission of 1 to 32 bytes possible
Data rate up to 4 Mbit/s
SAB 82525
SAB 82526
SAF 82525
SAF 82526
CMOS IC
P-LCC-44-1
P-MQFP-44-2
Type
SAB 82525 N
SAB 82526 N
SAF 82525 N
SAF 82526 N
SAB 82525 H
Ordering Code
Q67100-H6486
Q67100-H6512
Q67100-H6504
Q67100-H6511
Q67101-H6482
Semiconductor Group
6
Package
P-LCC-44-1 (SMD)
P-LCC-44-1 (SMD)
P-LCC-44-1 (SMD)
P-LCC-44-1 (SMD)
P-MQFP-44-2 (SMD)
10.94

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