Q67120-C1045 データシートの表示（PDF） - Infineon Technologies

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Q67120-C1045

8-Bit CMOS Microcontroller

Infineon Technologies 

C509-L

Memory Organization

The C509-L CPU manipulates data and operands in the following five address spaces:

– up to 64 Kbyte of external program memory

– up to 64 Kbyte of external data memory

– 512 byte of internal Boot ROM (program memory)

– 256 bytes of internal data memory

– 3 Kbyte of external XRAM data memory

– a 128 byte special function register area

Figure 5 illustrates the memory address spaces of the C509-L.

Figure 5

C509-L Memory Map

The C509-L can operate in four different operating modes (chipmodes) with different program and

data memory organizations :

– Normal Mode

– XRAM Mode

– Bootstrap Mode

– Programming Mode

Table 2 describes the program and data memory areas which are available in the different

chipmodes of the C509-L. It also shows the control bits of SFR SYSCON1, which are used for the

software selection of the chipmodes. Figures 6 to 9 shows the four chipmode configurations with

the code and data memory partitioning.

Semiconductor Group

15

09.96

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