Q67120-C1045 データシートの表示（PDF） - Infineon Technologies

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Q67120-C1045

8-Bit CMOS Microcontroller

Infineon Technologies 

C509-L

XRAM Mode Configuration

The XRAM Mode is implemented in the C509-L for executing e.g. up to 3K byte diagnostic software

which has been loaded into the XRAM in the Bootstrap Mode via the serial interface. In this

operating mode the Boot ROM, the XRAM, and the external data memory are mapped into the code

memory area, while the external ROM/EPROM is mapped into the external data memory area.

External program memory fetches from the SRAM are controlled by the P3.7/RD/PSENX pin.

External data memory read accesses from the ROM/EPROM are controlled by the PSEN/RDF pin.

In XRAM mode, the external data memory can only be read but not written.

Figure 7

Locations of Code- and Data Memory in XRAM Mode

Semiconductor Group

18

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