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SAK-XC822MT-1FRA データシートの表示(PDF) - Infineon Technologies

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SAK-XC822MT-1FRA
Infineon
Infineon Technologies Infineon
SAK-XC822MT-1FRA Datasheet PDF : 52 Pages
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XC822/824
Summary of Features
1
Summary of Features
The XC822/824 has the following features:
• High-performance XC800 Core
– compatible with standard 8051 processor
– two clocks per machine cycle architecture (for memory access without wait state)
– two data pointers
• On-chip memory
– 8 Kbytes of Boot ROM, Library ROM and User routines
– 256 bytes of RAM
– 256 bytes of XRAM
– 2/4 Kbytes of Flash (includes memory protection strategy)
• I/O port supply at 2.5 V - 5.5 V and core logic supply at 2.5 V (generated by
embedded voltage regulator)
2/4K Bytes LED and Touch Sense
Flash
Controller
IIC
UART
SSC
Port 0
Boot ROM
8K Bytes
XRAM
256 Bytes
XC800 Core
Capture/Compare Unit
16-bit
On-Chip
Debug
Support
Port 1
Compare Unit
16-bit
ADC
10-bit
4-channel
Port 2
RAM Timer 0
256 Bytes 16-bit
Timer 1
16-bit
Timer 2 Real-Time Watchdog
16-bit
Clock
Timer
MDU
7-bit Digital I/O
6-bit Digital I/O
4-bit Digital/
Analog Input
Figure 1 XC822/824 Functional Units
• Power-on reset generation
• Brownout detection for IO supply and core logic supply
• 48 MHz on-chip OSC for clock generation
– Loss-of-Clock detection
(more features on next page)
Data Sheet
1
V1.2, 2011-10

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