DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

XC226X データシートの表示(PDF) - Infineon Technologies

部品番号
コンポーネント説明
メーカー
XC226X Datasheet PDF : 101 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
XC2267 / XC2264
XC2000 Family Derivatives
Preliminary
General Device Information
Table 2
Pin Definitions and Functions (cont’d)
Pin Symbol
Ctrl. Type Function
10 VDDIM
-
PS/M Digital Core Supply Voltage for Domain M
Decouple with a 680 nF ceramic capacitor.
38, VDDI1
64,
88
14 VDDPA
2,
VDDPB
25,
27,
50,
52,
75,
77,
100
-
PS/1 Digital Core Supply Voltage for Domain 1
Decouple each with a 220 nF ceramic capacitor.
All VDDI1 pins must be connected to each other.
-
PS/A Digital Pad Supply Voltage for Domain A
Connect decoupling capacitors to adjacent
VDDP/VSS pin pairs as close as possible to the pins.
Note: The A/D_Converters and ports P5, P6, and
P15 are fed from supply voltage VDDPA.
-
PS/B Digital Pad Supply Voltage for Domain B
Connect decoupling capacitors to adjacent
VDDP/VSS pin pairs as close as possible to the pins.
Note: The on-chip voltage regulators and all ports
except P5, P6, and P15 are fed from supply
voltage VDDPB.
1, VSS
26,
51,
76
-
PS/-- Digital Ground
All VSS pins must be connected to the ground-line
or ground-plane.
1) To generate the reference clock output for bus timing measurement, fSYS must be selected as source for
EXTCLK and P2.8 must be selected as output pin. Also the high-speed clock pad must be enabled. This
configuration is referred to as reference clock output signal CLKOUT.
Data Sheet
27
V0.1, 2007-02
Draft Version

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]