SCN2652 データシートの表示（PDF） - Philips Electronics

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SCN2652

Multi-protocol communications controller(MPCC)

Philips Electronics 

Philips Semiconductors

Multi-protocol communications controller (MPCC)

Product specification

SCN2652/SCN68652

RxSI

M

U

X

SEL

FROM

XMITTER

SYNC

FF

1-BIT

DELAY

MM

S/F

CCSR (8)

SYNC/FLAG1

COMPARATOR

BCP

BOP

M

U

X

BCP . CRC

BOP . CRC

BCP . CRC

8

8

HSR (16)

ZERO (BOP)

DELETION

LOGIC

ZERO

DELETION

CONTROL

M

U

X

BOP . CRC

TO

RDSRL

RxSR (8)

PARITY (BCP)

LOGIC

RxCRC ACC

CRC–16 (BCP) OR

CCRC–CCITT

(BOP)

CRC–16 = 0

COMPARATOR

CRC–CCIT = F0B8

RERR

RESET

RxE

RxA

RxDA

RxSA

RECEIVER

CONTROL

LOGIC

NOTES:

1. Detected in SYNC FF and 7 MS bits of CCSR.

2. In BOP mode, a minimum of two data characters must be received to turn the receiver active.

RxC

Figure 4. MPCC Receiver Data Path

TFDRSOAMRLOR PCSARL (SYNC)

SD00060

RESET

TxE

TxA

TxBE

TRANS-

MITTER

CONTROL

LOGIC

TXSR (8)

TxU

M

U

TXCRC ACC (16)

X

CRC–16 OR CRC–CCITT

SEL1, 2

TxC

CONTROL

CHARACTER

GENERATOR

FLAG ABORT GA

NOTES:

1. TxCRC selected if TEOM = 1 and the last data character has been shifted out of TxSR.

2. In BCP parity selected will be generated after each character is shifted out of TxSR.

Figure 5. MPCC Transmitter Data Path

1995 May 01

6

SYNC

FF

1 BIT

DELAY

TxSO

BOP

ZERO

INSERTION

LOGIC

ZERO

INSERTION

CONTROL

BCP

PARITY

GENERATION

SD00088

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