SG3526 データシートの表示（PDF） - ON Semiconductor
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SG3526 Datasheet PDF : 9 Pages
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SG3526
2.5
200
100 RD = 0 Ω
2.0
50
1.5
20
1.0
10
0.5
5.0
0
2.0
2.0
5.0
10
20
50
100 200
IC, SINK CURRENT (mA)
Figure 8. VC Saturation Voltage as a
Function of Sink Current
OSCILLATOR PERIOD (ms)
Figure 9. Oscillator Period
VCC
Q6
Vref
Q5
125
μA
Q11
Q3
50μA
Q4
50μA
14μA
100
14μA
μA
Q7
Q8 Q9
Q12
100μA
3 Compensation
Q10 100μA
Q1
Q2
1.0k
500
1.0k
500
Vref
1.2V
Bandgap
Reference
R1
+
−
R2
To Reset
To Driver A
To Driver B
− Error
1
+ Error
Figure 10. Error Amplifier
Figure 11. Undervoltage Lockout
Sync
PWM
SQ
D
Q
Metering
F/F
Memory
F/F
S
RQ
Clock
The metering Flip−Flop is an asynchronous data latch
which suppresses high frequency oscillations by allowing
only one PWM pulse per oscillator cycle.
PWM
The memory Flip−Flop prevents double pulsing in a
push−pull configuration by remembering which output
produced the last pulse.
Figure 12. Pulse Processing Logic
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