SGM4717 データシートの表示（PDF） - Shengbang Microelectronics Co, Ltd
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SGM4717 Datasheet PDF : 11 Pages
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TEST CIRCUITS (Cont.)
RS
IN+
SGM4717
NO1 or NC1
COM1
IN1
OUT+
CL
Rise Time Delay = |tINRISE–tOUTRISE|
Fall Time Delay = |tINFALL–tOUTFALL|
Rise Time to Fall Time Mismatch = |tOUTFALL–tOUTRISE|
RS
IN-
NO2 or NC2
IN2
COM2
OUT-
CL
V+
VIN+
0V
V+
VIN-
0V
V+
VOUT+
0V
V+
VOUT-
ON
0V
tINFALL
50% 90%
10%
50%
tINFALL
50%
90%
10%
50%
tINRISE
90%
10%
tINRISE
90%
10%
tSKEW
Test Circuit 4. Output Signal Skew
V+
0.1µF
Source
Signal
V+
NO or NC
COM
IN
GND
Test Circuit 5. Off Isolation
VOUT
CL
5pF
７
SGM4717
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