ADV7160KS140 データシートの表示（PDF） - Analog Devices
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ADV7160KS140 Datasheet PDF : 44 Pages
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ADV7160/ADV7162–SPECIFICATIONS (VAA1 =+5V;VREF =+1.235V;RSET =280Ω.IOR,IOG,IOB(RL =37.5Ω,
CL = 10 pF). All specifications TMIN to TMAX2 unless otherwise noted.)
Parameter
Min
Typ Max
Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
Coding
10
Bits
(DAC Gain Setting = 3996)
±1
LSB
±1
LSB
Guaranteed Monotonic
±5
% Gray Scale
Binary
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
CLOCK INPUTS (CLOCK, CLOCK)
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Current, IIN (JTAG Inputs)
Input Capacitance, CIN
DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
2
10
VAA – 1.0
10
2.4
20
V
0.8
V
± 10
µA
pF
V
VAA – 1.6 V
± 10
µA
± 50
µA
pF
V
0.4
V
20
µA
pF
VIN = 0.4 V or 2.4 V
VIN = 0.4 V or 2.4 V
VIN = 0.4 V or 2.4 V
ISOURCE = 400 µA
ISINK = 3.2 mA
ANALOG OUTPUTS
Gray Scale Current Range
Output Current
White Level Relative to Blank
White Level Relative to Black
Black Level Relative to Blank
Blank Level
Blank Level
Sync Level
Tri-Sync Level Relative to Blank
LSB Size
DAC to DAC Matching
Output Compliance, VOC
Output Impedance, ROUT
Output Capacitance, COUT
VOLTAGE REFERENCE
Voltage Reference Range, VREF
Input Current, IVREF
POWER REQUIREMENTS
VAA
IAA3
IAA3
Power Supply Rejection Ratio
15
22
mA
17.69 19.05 20.40
mA
16.74 17.62 18.50
mA
0.95
1.44 1.90
mA
0
5
50
µA
6.29
7.62 8.96
mA
0
5
50
µA
6.29
7.62 8.96
mA
17.22
µA
1
3
%
0
+1.4
V
30
kΩ
30
pF
1.14
1.235 1.26
V
5
µA
5
V
475
mA
440
mA
410
mA
450
mA
400
mA
360
mA
0.1
%/%
(DAC Gain Setting = 3996)
Sync Disabled
Sync Enabled
IOUT = 0 mA
VREF = 1.235 V for Specified Performance
For 220 MHz Operation (ADV7160)
For 170 MHz Operation (ADV7160)
For 140 MHz Operation (ADV7160)
For 220 MHz Operation (ADV7162)
For 170 MHz Operation (ADV7162)
For 140 MHz Operation (ADV7162)
COMP = 0.1 µF
DYNAMIC PERFORMANCE
Clock and Data Feedthrough4, 5
Glitch Impulse
DAC to DAC Crosstalk6
–30
dB
50
pV secs
–23
dB
NOTES
1± 5% for all versions.
2Temperature range (TMIN to TMAX): 0°C to +70°C.
3Pixel Port is continuously clocked with data corresponding to a linear ramp. T J = 100oC.
4Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data feedthrough.
5TTL input values are 0 V to 3 V, with input rise/fall times ≤3 ns, measured the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
6DAC to DAC Crosstalk is measured by holding one DAC high while the other two are making low to high and high to low transitions.
Specifications subject to change without notice.
–2–
REV. 0
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