SI5322 データシートの表示（PDF） - Silicon Laboratories

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SI5322

PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER

Silicon Laboratories 

Si5322

VDD = 3.3 V

System

Power

Supply

Ferrite

Bead

130 Ω

82 Ω

130 Ω

82 Ω

CKIN1+

CKIN1–

C4 1 µF

C3 0.1 µF

C2 0.1 µF

C1 0.1 µF

Input

Clock

Sources1

VDD = 3.3 V

130 Ω

130 Ω

82 Ω

82 Ω

CKIN2+

CKIN2–

Si5322

CKOUT1+

CKOUT1–

CKOUT2+

CKOUT2–

C1B

C2B

0.1 µF

+

100 Ω

–

0.1 µF

0.1 µF

+

100 Ω

–

0.1 µF

Clock

Outputs

CKIN_1 Loss of Signal

CKIN_2 Loss of Signal

Manual/Automatic Clock

Selection (L)

Input Clock Select/

Active Clock Indicator

Frequency Table Select

Frequency Select

Bandwidth Select

Signal Format Select

Clock Output 2 Disable/

Bypass Mode Control

Reset

AUTOSEL2

CS_CA3

FRQTBL2

FRQSEL[3:0]2

BWSEL[1:0]2

SFOUT[1:0]2

DBL2_BY2

RST

Notes: 1. Assumes differential LVEPECL termination (3.3 V) on clock inputs.

2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).

3. Assumes manual input clock selection.

Figure 1. Si5322 Typical Application Circuit

4

Preliminary Rev. 0.47

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