CA3162 データシートの表示（PDF） - Harris Semiconductor
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CA3162 Datasheet PDF : 7 Pages
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Specifications CA3162, CA3162A
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage (Between Pins 7 & 14). . . . . . . . . . . . . . . . . +7V
Input Voltage (Pin 10 or 11 to Ground) . . . . . . . . . . . . . . . . . . . . . ±15V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC
Thermal Resistance
θJA
Plastic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . 90oC/W
Operating Temperature Range
CA3162E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to +75oC
CA3162AE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
Maximum Power Dissipation
Plastic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.67W
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications TA = +25oC, V+ = 5V, Zero Pot Centered, Gain Pot = 2.4kΩ Unless Otherwise Specified
PARAMETERS
TEST CONDITIONS
MIN
TYP MAX
UNITS
Operating Supply Voltage Range, V+
4.5
5
5.5
V
Supply Current, I+
100kΩ to V+ on Pins 3, 4, 5
-
-
17
mA
Input Impedance, ZI
Input Bias Current, IIB
Unadjusted Zero Offset
Unadjusted Gain
Linearity
Pins 10 and 11
V11-V10 = 0V, Read Decoded Output
V11-V10 = 900mV, Read Decoded Output
Notes 1 and 2
-
100
-
MΩ
-
-80
-
nA
-12
-
+12
mV
846
-
954
mV
-1
-
+1
Count
Conversion Rate
Slow Mode
Pin 6 = Open or GND
-
4
-
Hz
Fast Mode
Pin 6 = 5V
-
96
-
Hz
Conversion Control Voltage (Hold Mode)
at Pin 6
0.8
1.2
1.6
V
Common Mode Input Voltage Range, VICR
Notes 3, 4
-0.2
-
+0.2
V
BCD Sink Current at Pins 1, 2, 15, 16
VBCD ≥ 0.5V, at Logic Zero State
0.4
1.6
-
mA
Digit Select Sink Current at Pins 3, 4, 5
Zero Temperature Coefficient
VDIGIT Select = 4V at Logic Zero State
VI = 0V, Zero Pot Centered
1.6
2.5
-
10
-
mA
-
µV/oV
Gain Temperature Coefficient
VI = 900mV, Gain Pot = 2.4kΩ
-
0.005
-
%/oC
NOTES:
1. Apply zero volts across V11 to V10. Adjust zero potentiometer to give 000mV reading. Apply 900mV to input and adjust gain potentiometer
to give 900mV reading.
2. Linearity is measured as a difference from a straight line drawn through zero and positive full scale. Limits do not include ±0.5 count bit
digitizing error.
3. For applications where low input pin 10 is not operated at pin 7 potential, a return path of not more than 100kΩ resistance must be provided
for input bias currents.
4. The common mode input voltage above ground cannot exceed +0.2V if the full input signal range of 999mV is required at pin 11. That is,
pin 11 may not operate higher than 1.2V positive with respect to ground or 0.2V negative with respect to ground. If the maximum input
signal is less than 999mV, the common mode input voltage may be raised accordingly.
2-7
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