8212BM データシートの表示（PDF） - Nippon Precision Circuits

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8212BM

POCSAG Decoder For Multiframe Pagers

Nippon Precision Circuits  

NIPPON PRECISION CIRCUITS INC.

OVERVIEW

The SM8212B is a POCSAG-standard (Post Office Code

Standardization Advisory Group) signal processor LSI,

which conforms to CCIR recommendation 584 concern-

ing standard international wireless calling codes.

The SM8212B supports call messages in either tone,

numerical or character outputs at signal speeds of 512,

1200 or 2400 bps. The signal input stage features a built-in

filter.

Each of the addresses (max. 8) can be assigned to any

frame, which also makes the device configurable for many

additional services. Each address can be independently set

ON/OFF.

Furthermore, built-in buffer memory means decoded

information can be fetched in sync with the microcon-

troller clock, thereby reducing the microcontroller CPU

time required.

Intermittent-duty method (battery saving (BS) method)

control signals, compatible with PLL operation, and

Molybdenum-gate CMOS structure makes possible the

construction of low-voltage operation, low power dissipa-

tion systems.

The SM8212B is available in 16-pin SSOPs.

FEATURES

SM8212B

POCSAG Decoder For Multiframe Pagers

- BS2 (RF DC-level adjustment signal) before/during

reception selectable adjustment timing

- 1-bit and 2-bit burst error auto-correction function

- 25 to 75% duty factor signal coverage

- 8 rate error detection condition settings

- 76.8 kHz system clock (crystal oscillator)

- 76.8 or 38.4 kHz clock output pin

- Built-in oscillator capacitor and feedback resistor

- 2.0 to 3.5 V operating supply voltage

- Molybdenum-gate CMOS process realizes low power

dissipation

- 16-pin SSOP

PINOUTS (16-pin SSOP)

BS1 1

BS2

BS3

SIGNAL

XVSS

XT

XTN

VSS 8

16 VDD

ATTN

SDI

SDO

SCK

AREA

RSTN

9 CLKO

- Conforms to POCSAG standard for pagers

- 512, 1200 or 2400 bps signal speed

- Multiframe compatible (each address individually

controllable)

- 8 addresses × 4 sub-address (total of 32 addresses)

control

- Built-in buffer memory

- Supports tone, numeric or character call messages

- Built-in input signal filter, with filter ON/OFF and 4

selectable filter characteristics

- PLL-compatible battery saving method (BS1, BS2,

BS3 outputs)

- BS1 (RF control main output signal) 61-step setup

time setting

- BS3 (PLL setup signal) 61-step setup time setting

PACKAGE DIMENSIONS (Unit: mm)

16-pin SSOP (SM8212BM)

0.6TYP

6.8 0.3

0.36 0.1

0.8

+ 0.10

0.15 - 0.05

0 10

0.4 0.2

NIPPON PRECISION CIRCUITS-1

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