SMH4812 データシートの表示（PDF） - Summit Microelectronics

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SMH4812

Distributed Power Hot-Swap Controller

Summit Microelectronics 

SMH4812

Preliminary

ENPG (14)

The ENPG input controls the PG# output. When ENPG is

pulled low the PG# output is immediately placed in a high

impedance state. If ENPG is driven high then the PG#

output will immediately be driven low.

PG# (15)

PG# is an open-drain, active-low output with no internal

pull-up resistor. It can be used to switch a load or enable

a DC/DC converter. PG# is enabled immediately after

VGATE reaches VDD – VGT and the DRAIN SENSE

voltage is less than 2.5V. Voltage on these pins cannot

exceed 12V, as referenced to VSS.

VDD (16)

VDD is the positive supply connection. An internal shunt

regulator connected between VDD and VSS develops ap-

proximately 12V that supplies the SMH4812. A resistor

must be placed in series with the VDD pin to limit the

regulator current (RD in the application illustrations).

VSS (8)

VSS is connected to the negative side of the supply.

2055 4.0 12/22/00

SUMMIT MICROELECTRONICS, Inc.

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