SMM150NR05 データシートの表示（PDF） - Summit Microelectronics

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SMM150NR05

Single-Channel Supply Voltage Marginer/Monitor

Summit Microelectronics 

APPLICATIONS INFORMATION (CONTINUED)

When measuring the delay time external to the device,

ADC sample time and Update Trim time (≅ 4ms) must

be added to the internally programmed delay time as

shown:

Spec

2.5 ms

5 ms

10 ms

17.5 ms

Actual measurement

6.5 ms

9 ms

14 ms

22 ms

MONITOR

The SMM150 monitors the COMP1 and COMP2 pins.

COMP1 and COMP2 are high impedance inputs, each

connected internally to a comparator and compared

against the programmable internal reference voltage.

Each comparator can be independently programmed

to monitor for either UV or OV. The monitor level is

set externally with a resistive voltage divider. The

COMP pins can be connected to Vin, Vout or any

voltage that needs to be monitored. The internal

comparators COMP1/2 are compared to VREF, so the

voltage dividers are set above or below the

programmed VREF level depending on whether

monitoring UV or OV. As an example, with VREF set

to 1.25V, to monitor an OV of 1.7V on COMP1 and a

UV of 1.3V on COMP2, the voltage divider resistors

are:

For OV, RUpper = 1.37k, 1% RLower = 3.83k, 1%.

For UV, RUpper = 1.02k, 1% RLower = 25.5k, 1%.

The part can be programmed to trigger the FAULT#

pin when either COMPx comparator has exceeded the

UV or OV range. The READY and FAULT# outputs of

the SMM150 are active as long as the triggering limit

remains in a fault condition. The READY pin is

programmable active high/low open drain output

indicates that VM is at its’ set point.

When programmed as an active high output, READY

can also be used as an input. When pulled low, it will

latch the state of the comparator inputs. When either

of the COMP1 or COMP2 inputs are in fault, the open-

drain FAULT# output will be pulled low. A

configuration option exists to disable the FAULT#

output while the device is in margining mode.

STATUS REGISTER

A status register exists for I2C polling of the status of

the COMP1 and COMP2 inputs. Two bits in this

status register reflect the current state of the inputs (1

= fault, 0 = no fault). Two additional bits show the

state of the inputs latched by one of two events

programmed in the configuration.

SMM150

Preliminary Information

The first event option is the FAULT# output going

active. The second event option is the READY pin

going low. The READY pin is an I/O. As an output,

the READY output pin goes active when the DC

controlled voltages are at their set point. As an input

programmed to active high, it can be pulled low

externally and latch the state of the COMP inputs.

This second event option allows the state of the

COMP inputs on multiple devices to be latched at the

same time while a host monitors their FAULT#

outputs.

MARGINING

The SMM150 has two additional control voltage

settings: margin high and margin low. The margin

high and margin low settings can be as much as ±10%

of the nominal setting depending on the manufacturer.

The margin high and margin low voltage settings can

range from 0.3V to VDD around the converters’

nominal output voltage setting depending on the

specified margin range of the DC-DC converter. These

settings are stored in the configuration registers and

are loaded into the control voltage setting by margin

commands issued via the I2C bus.

The margin command registers contain two bits that

decode the commands to margin high or margin low.

Once the SMM150 receives the command to margin

the supply voltage, it begins adjusting the supply

voltage to move toward the desired setting. When this

voltage setting is reached, a bit is set in the margin

status registers and the READY signal becomes

active.

Note: Configuration writes or reads of registers 00HEX

to 03HEX should not be performed while the SMM150

is margining.

FAULTS

When either of the COMP1 or COMP2 inputs are in

fault, the open-drain FAULT# output will be pulled low.

A configuration option exists to disable the FAULT#

output while the device is margining. If “Fault Output

Disabled while Margining” is selected, Faults are

disabled for all margining except when margining to

the ‘Off’ and ‘Nominal’ states. Also, the programmable

feature ‘Fault Holds Off and Shutdown Control’ is

enabled only for the Nominal margin state.

Summit Microelectronics, Inc

2075 2.6 05/13/05

10

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