SMM150NCR03 データシートの表示（PDF） - Summit Microelectronics
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SMM150NCR03 Datasheet PDF : 22 Pages
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APPLICATIONS INFORMATION (CONTINUED)
SMM150
Preliminary Information
Fault Latched by a Fault Condition:
The “Fault Latched by a Fault Condition”
programmable option is triggered only on the leading
edge of a Fault. That is, a latched fault can be cleared
while the Fault yet exists.
Fault Latched by Ready I/O Pin:
Fault Latched by Ready I/O pin functions on the
margin transitions from Off to Hi/Low/Nominal or from
Nominal to Hi/Low or Hi/Low to Nominal but not from
Hi/Low/Nominal to Off.
WRITE PROTECTION
Write protection for the SMM150 is located in a volatile
register where the power-on state is defaulted to write
protect. There are separate write protect modes for the
configuration registers and memory. In order to
remove write protection, the code 55HEX is written to
the write protection register.
Other codes will enable write protection. For example,
writing 59HEX will allow writes to the configuration
register but not to the memory, while writing 35HEX will
allow writes to the memory but not to the configuration
registers. The SMM150 also features a Write Protect
pin (WP input) which, when asserted, prevents writing
to the configuration registers and EE memory. In
addition to these two forms of write protection there is
a configuration register lock bit which, once
programmed, does not allow the configuration
registers to be changed.
A2, A1, A0
The address bits A[2:0] can be hard wired High or Low
or may be left open (High-Z) to allow for a total of 21
distinct device addresses. When floating, the inputs
can tolerate the amount of leakage as described by
the specification IAIT. An external 100k pull-up or pull
down resistor is sufficient to set a High or Low logic
level.
+VIN - 2.7V to 5.5V
MDN
MUP
Vdd
J2
1
2
1
2
D1
DIODE
Programming Supply
J1
1
3
Gnd
SCL
2
4
5 Gnd3 SDA 6
7
9
Rsrv5 MR
+10V Rsrv8
+5V Rsrv10
8
10
I2C SMX3200 Connector
Vdd
U3
25
24 MDN
MUP
READY
FAULT#
C1
0.01uF
19
COMP1
C2
0.1uF
R3
20
C3
10uF
C8
0.1uF
COMP2 12
1
28
SCL
SMM150
VM 14
C10
8 SDA
0.1uF
WP
6
4
A0
2 A1
TRIM 20
R4 2.5k
R5
A2
7 GND
CAP_M 10
C4
0.02uF
R6
C6
0.01uF
DC-DC Converter
U2
7
8
11
9
+Vin
+Vin
Enable
+Vin
C9
0.01uF
+Vout
+Vout
+Vout
1
2
4
3
Sense
Trim 10
VOUT = 1.5V
R7
R8
C7
0.01uF
C5
1uF
Figure 6 – Typical applications schematic which shows the SMM150 controlling a 3.3V in/1.5V out DC/DC
converter. Care should be taken to filter DC/DC converter noise from the SMM150 VDD supply pin. This is
accomplished with optional components R3, C1, C2, C3 and C10. This example, using a 1.25V VREF, also
shows the COMP1/2 pins monitoring the DC/DC converter VOUT set to an OV of 1.7V on COMP1 and a UV of
1.3V on COMP2, the voltage divider resistors are:
For OV, R5 = 1.37k, 1% R6 = 3.83k, 1%, For UV, R7= 1.02k, 1% R8 = 25.5k, 1%.
The jumper J2 can be used to supply the SMM150 VDD voltage from the SMX3200 programmer when the
device is programmed with board power off and the controlled supply unloaded.
Summit Microelectronics, Inc
2075 2.6 05/13/05
11
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