MX27C2100 データシートの表示（PDF） - Macronix International
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MX27C2100 Datasheet PDF : 18 Pages
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MX27C2100/27C2048
FEATURES
• 128K x 16 organization(MX27C2048, JEDEC pin
out)
• 256K x 8 or 128K x 16 organization(MX27C2100,
ROM pin out compatible)
• +12.5V programming voltage
• Fast access time: 55/70/90/120/150 ns
• Totally static operation
2M-BIT [256Kx8/128x16] CMOS EPROM
• Completely TTL compatible
• Operating current: 40mA
• Standby current: 100uA
• Package type:
- 40 pin plastic DIP
- 44 pin PLCC(MX27C2048)
- 40 pin TSOP(I)(MX27C2048)
GENERAL DESCRIPTION
The MX27C2100/2048 is a 5V only, 2M-bit, One Time
Programmable Read Only Memory. It is organized as
128K words by 16 bits per word(MX27C2048), 256K x 8
or 128K x 16(MX27C2100), operates from a single + 5
volt supply, has a static standby mode, and features fast
single address location programming. All programming
signals are TTL levels, requiring a single pulse. For
programming outside from the system, existing EPROM
programmers may be used. The MX27C2100/2048
supports a intelligent fast programming algorithm which
can result in programming times of less than one minute.
This EPROM is packaged in industry standard 40 pin
dual-in-line packages, 44 lead PLCC, and 40 lead
TSOP(I) packages.
PIN CONFIGURATIONS
PDIP(MX27C2048)
VPP 1
40
CE 2
39
Q15 3
38
Q14 4
37
Q13 5
36
Q12 6
35
Q11 7
34
Q10 8
33
Q9 9
32
Q8 10
31
GND 11
30
Q7 12
29
Q6 13
28
Q5 14
27
Q4 15
26
Q3 16
25
Q2 17
24
Q1 18
23
Q0 19
22
OE 20
21
VCC
PGM
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
40-TSOP(I)10x14mm (MX27C2048)
A9
1
A10
2
A11
3
A12
4
A13
5
A14
6
A15
7
A16
8
PGM
9
VCC
10
VPP
11
CE
12
Q15
13
Q14
14
Q13
15
Q12
16
Q11
17
Q10
18
Q9
19
Q8
20
MX27C2048
P/N: PM0158
PLCC(MX27C2048)
6
Q12 7
Q11
Q10
Q9
Q8
GND 12
NC
Q7
Q6
Q5
Q4 17
18
1 44
MX27C2048
23
40
39 A13
A12
A11
A10
A9
34 GND
NC
A8
A7
A6
29 A5
28
BLOCK DIAGRAM (MX27C2048)
40
GND
39
A8
38
A7
CE
PGM
OE
CONTROL
LOGIC
37
A6
36
A5
35
A4
34
A3
33
A2
32
A1
.
Y-DECODER
.
.
.
31
A0
30
OE
29
Q0
28
Q1
27
Q2
26
Q3
25
Q4
24
Q5
.
A0~A16
.
ADDRESS
.
INPUTS
.
.
.
.
.
.
X-DECODER
.
.
.
23
Q6
22
Q7
21
GND
VCC
VPP
VSS
OUTPUT
BUFFERS
Y-SELECT
2M BIT
CELL
MAXTRIX
Q0~Q15
REV. 4.3, AUG. 22, 2000
1
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