MX29L3211 データシートの表示（PDF） - Macronix International
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MX29L3211 Datasheet PDF : 38 Pages
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MX29L3211
WRITE OPERATIONS
Commands are written to the COMMAND INTERFACE
REGISTER (CIR) using standard microprocessor write
timings. The CIR serves as the interface between the
microprocessor and the internal chip operation. The
CIR can decipher Read Array, Read Silicon ID, Erase
and Program command. In the event of a read command,
the CIR simply points the read path at either the array or
the silicon ID, depending on the specific read command
given. For a program or erase cycle, the CIR informs the
write state machine that a program or erase has been
requested. During a program cycle, the write state
machine will control the program sequences and the
CIR will only respond to status reads. During a sector/
chip erase cycle, the CIR will respond to status reads
and erase suspend. After the write state machine has
completed its task, it will allow the CIR to respond to its
full command set. The CIR stays at read status register
mode until the microprocessor issues another valid
command sequence.
Device operations are selected by writing commands
into the CIR. Table 3 below defines 32 Mbit flash family
command.
TABLE 3. COMMAND DEFINITIONS
Command
Sequence
Bus Write
Cycles Req'd
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read/
Reset
4
Silicon
ID Read
4
Page/Byte Chip
Program Erase
4
6
Sector
Erase
6
Erase
Suspend
3
Erase
Resume
3
Read
Clear
Status Reg. Status Reg.
4
3
5555H 5555H 5555H
AAH AAH
AAH
2AAAH 2AAAH 2AAAH
55H
55H
55H
5555H 5555H 5555H
F0H
90H
A0H
RA
00H/01H PA
RD
C2H/F9H PD
5555H 5555H
AAH AAH
2AAAH 2AAAH
55H
55H
5555H 5555H
80H
80H
5555H 5555H
AAH AAH
2AAAH 2AAAH
55H
55H
5555H SA
10H
30H
5555H
AAH
2AAAH
55H
5555H
B0H
5555H
AAH
2AAAH
55H
5555H
D0H
5555H
AAH
2AAAH
55H
5555H
70H
X
SRD
5555H
AAH
2AAAH
55H
5555H
50H
P/N:PM0641
REV. 0.3, NOV. 06, 2001
6
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