NE590N データシートの表示（PDF） - Philips Electronics
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NE590N Datasheet PDF : 9 Pages
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Philips Semiconductors Linear Products
Addressable peripheral drivers
Product specification
NE590/591
PIN DESIGNATION
590
PIN NO.
591
PIN NO.
1-3
2-4
4-7,
9-12
5-8,
11-14
13
15
14
16
15
17
-
1
-
10
SYMBOL
NAME & FUNCTION
A0-A2
Q0-Q7
D
CE
CLR
CS
VS
A 3-bit binary address on these pins defines which of the 8 output latches is to receive the data.
The 8 device outputs. The NE590 has open-collector Darlington outputs. The NE591 has open emit-
ter-follower outputs.
The data input. When the chip is enabled, this data bit is transferred to the defined output such that:
“1” turns output switch “ON”
“0” turns output switch “OFF”
Thus in logic terms, the NE590 inverts data to the relevant output. The NE591 retains true data at the
output.
The chip enable. When this input is low, the output latches will accept data. When CE goes high, all
outputs will retain their existing state regardless of address or data input conditions.
The clear input. When CLR goes low all output switches are turned “OFF”. On the NE590, a high
data input will override the clear function on the addressed latch. On the NE591, CLR low will over-
ride any other condition.
The chip select input provides for an additional level of address decoding.
The VS line provides the power to all 8 output devices. It is connected to the collectors of all 8 output
transistors. This pin may be connected to the VCC or another supply.
BLOCK DIAGRAM
CLR
CE
A0
A1
A2
D
1–OF–8
DECODER
COMTROL
GATE
cs
(NE51 ONLY)
INPUT STAGE
VCC
NE590
LATCH
Q0
LATCH
Q1
LATCH
Q2
LATCH
Q3
LATCH
Q4
LATCH
Q5
LATCH
Q6
LATCH
Q7
OUTPUT STAGE
NE591
August 31, 1994
519
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