SA5090N データシートの表示（PDF） - Philips Electronics
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SA5090N Datasheet PDF : 6 Pages
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Philips Semiconductors Linear Products
Addressable relay driver
Product specification
NE/SA5090
PIN DESIGNATION
PIN NO.
SYMBOL
1-3
4-7, 9-12
13
A0-A2
Q0-Q7
D
14
CE
15
CLR
NAME AND FUNCTION
A 3-bit binary address on these pins defines which of the 8 output latches is to receive the data.
The 8 device outputs.
The data input. When the chip is enabled, this data bit is transferred to the defined output such that:
“1” turns output switch “ON”
“0” turns output switch “OFF”
The chip enable. When this input is low, the output latches will accept data. When CE goes high, all
outputs will retain their existing state, regardless of address of data input condition.
The clear input. When CLR goes low all output switches are turned “OFF”. The high data input will
override the clear function on the addressed latch.
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Small Outline Large (SOL) Package
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Small Outline Large (SOL) Package
TEMPERATURE RANGE
0 to +70°C
0 to +70°C
-40 to +85°C
–40 to +85°C
ORDER CODE
NE5090D
NE5090N
SA5090N
SA5090D
DWG #
0171B
0406C
0406C
0171B
TRUTH TABLE
INPUTS
OUTPUTS
MODE
CL C D A A A
RE
01 2
QQQQQQQQ
0 123456 7
L H X X X X H H H H H H H H Clear
L L L L L L H HHHHHH H
L LHL L L L HHHHHH H
L L L H L L H H H H H H H H Demultiplex
L LHHL L H LHHHHH H
L L LHH H H HHHHHH H
L LHHH H H HHHHHH L
H H X X X X QN-1
H L L L L L H QN-1
H L H L L L L QN-1
H L L H L L QN-1 H QN-1
H L H H L L QN-1 L QN-1
H L L H H H QN-1
H L H H H H QN-1
NOTES:
X=Don’t care condition
QN-1=Previous output state
L=Low voltage level/“ON” output state
H=High voltage level/“OFF” output state
Memory
Addressable Latch
H
L
August 31, 1994
513
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