SN74LS157M データシートの表示（PDF） - ON Semiconductor

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SN74LS157M

Quad 2−Input Multiplexer

ON Semiconductor 

SN74LS157

VCC E I0c I1c Zc I0d I1d Zd

16 15 14 13 12 11 10 9

NOTE: The Flatpak version has the same

pinouts (Connection Diagram) as

the Dual In-Line Package.

1

2

3

4

56

78

S I0a I1a Za I0b I1b Zb GND

PIN NAMES

S

E

I0a − I0d

I1a − I1d

Za − Zd

Common Select Input

Enable (Active LOW) Input

Data Inputs from Source 0

Data Inputs from Source 1

Multiplexer Outputs

LOADING (Note a)

HIGH

LOW

1.0 U.L.

1.0 U.L.

0.5 U.L.

0.5 U.L.

10 U.L.

0.5 U.L.

0.5 U.L.

0.25 U.L.

0.25 U.L.

5 U.L.

NOTES: a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.

Figure 1. Connection Diagram DIP (TOP VIEW)

15 2 3 5 6 14 13 11 10

E I0a I1a I0b I1b I0c I1c I0d I1d

1S

Za Zb Zc Zd

4 7 12 9

VCC = PIN 16

GND = PIN 8

Figure 2. Logic Symbol

http://onsemi.com

2

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