SN74LS253MEL データシートの表示（PDF） - ON Semiconductor

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SN74LS253MEL

Dual 4-Input Multiplexer with 3-State Outputs

ON Semiconductor 

SN74LS253

CONNECTION DIAGRAM DIP (TOP VIEW)

VCC E0b S0 I3b I2b I1b I0b Zb

16 15 14 13 12 11 10 9

NOTE:

The Flatpak version has the same

pinouts (Connection Diagram) as

the Dual In-Line Package.

1 2 3 4 56 78

E0a S1 I3a I2a I1a I0a Za GND

PIN NAMES

S0, S1

Multiplexer A

E0a

I0a – I3a

Za

Multiplexer B

E0b

I0b – I3b

Zb

Common Select Inputs

Output Enable (Active LOW) Input

Multiplexer Inputs

Multiplexer Output

Output Enable (Active LOW) Input

Multiplexer Inputs

Multiplexer Output

NOTES:

a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.

LOADING (Note a)

HIGH

LOW

0.5 U.L.

0.25 U.L.

0.5 U.L.

0.5 U.L.

65 U.L.

0.25 U.L.

0.25 U.L.

15 U.L.

0.5 U.L.

0.5 U.L.

65 U.L.

0.25 U.L.

0.25 U.L.

15 U.L.

LOGIC SYMBOL

1 6 5 4 3 10 11 12 13 15

14

S0E0a I0a I1a I2a I3a I0b I1b I2b I3b E0b

2

S1

Za

Zb

7

9

VCC = PIN 16

GND = PIN 8

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