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TOP247 データシートの表示(PDF) - Power Integrations, Inc

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TOP247 Datasheet PDF : 52 Pages
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TOP242-250
CONTROL (C) Pin Operation
The CONTROL pin is a low impedance node that is capable of
receiving a combined supply and feedback current. During
SOURCE through resistor RE as shown in Figure 2. This
current flowing through RE controls the duty cycle of the power
MOSFET to provide closed loop regulation. The shunt
normal operation, a shunt regulator is used to separate the feed-
back signal from the supply current. CONTROL pin voltage
regulator has a finite low output impedance ZC that sets the
gain of the error amplifier when used in a primary feedback
VC is the supply voltage for the control circuitry including the
MOSFET gate driver. An external bypass capacitor closely
configuration. The dynamic impedance ZC of the CONTROL
pin together with the external CONTROL pin capacitance sets
connected between the CONTROL and SOURCE pins is the dominant pole for the control loop.
required to supply the instantaneous gate drive current. The
total amount of capacitance connected to this pin also sets the When a fault condition such as an open loop or shorted output
auto-restart timing as well as control loop compensation.
prevents the flow of an external current into the CONTROL
pin, the capacitor on the CONTROL pin discharges towards
When rectified DC high voltage is applied to the DRAIN pin 4.8 V. At 4.8 V, auto-restart is activated which turns the output
during start-up, the MOSFET is initially off, and the MOSFET off and puts the control circuitry in a low current
CONTROL pin capacitor is charged through a switched high standby mode. The high-voltage current source turns on and
voltage current source connected internally between the DRAIN charges the external capacitance again. A hysteretic internal
and CONTROL pins. When the CONTROL pinGvoletagne eVCral sIunppflyourndmer-vaolttaigoe cnom&paraTtorakebeplseVCowfithiCn aownindtoewnts
reaches approximately 5.8 V, the control circuitry is activated of typically 4.8 V to 5.8 V by turning the high-voltage current
and the soft-start begins. The soft-start circuit gradually
increases the duty cycle of the MOSFET from zero to the maxi-
source on and off as shown in Figure 8. The auto-restart
circuit has Pa drivoided-buy-ecigtht Scouentleer wchitcoh prrevGentus tihde oeut- 1
mum value over approximately 10 ms. If no external feedback/ put MOSFET from turning on again until eight discharge/charge
supply current is fed into the CONTROL pin by the end of the
soft-start, the high voltage current source is turned off and the
cycles have elapsed. This is accomplished by enabling the
Data Sheets 2 output MOSFET only when the divide-by-eight counter reaches
CONTROL pin will start discharging in response to the supply full count (S7). The counter effectively limits TOPSwitch-GX
current drawn by the control circuitry. If the power supply is
designed properly, and no fault condition such as open loop or
power dissipation by reducing the auto-restart duty cycle to
typically 4%. Auto-rAestpartpmloidce acotnitoinunes Nuntoil toeutpsut 3
shorted output exists, the feedback loop will close, providing voltage regulation is again achieved through closure of the
external CONTROL pin current, before the CONTROL pin
voltage has had a chance to discharge to the lower threshold
feedback loop.
Design Ideas 4
voltage of approximately 4.8 V (internal supply under-voltage Oscillator and Switching Frequency
lockout threshold). When the externally fed current charges
the CONTROL pin to the shunt regulator voltage of 5.8 V, cur-
The internal oscillator linearly charges and discharges an
Design Tools 5 internal capacitance between two voltage levels to create a
rent in excess of the consumption of the chip is shunted to sawtooth waveform for the pulse width modulator. This
Quality and Reliability 6
VLINE
0V
VUV
VC
0V
VDRAIN
S7
S0
Package Information 7
DPA-Switch DC-DC Seminar 8 S1 S2
S6 S7 S0 S1 S2
S6 S7
S0
S1 S2
S6 S7 S7
5.8 V
4.8 V
LinkSwitch & TinySwitch-II AC-DC Seminar 9
0V
TOPSwitch-GX AC-DC Seminar 10
VOUT
0V
Sales Representatives and Distributors 11
1
2
3
2
4
Note: S0 through S7 are the output states of the auto-restart counter
Figure 8. Typical Waveforms for (1) Power Up (2) Normal Operation (3) Auto-restart (4) Power Down.
PI-2545-082299
6
H
9/02

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