LIS1R02 データシートの表示（PDF） - STMicroelectronics

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LIS1R02

ANGULAR ACCELEROMETER

STMicroelectronics 

LIS1R02 (L6671)

The FIFO has four registers grouped into two banks. The first bank consists of the first and the second register.

The first register is the one written first since the last read. The second bank consists of the third and fourth

register.

0000: address for the first bank

0010: address for the second bank

The device puts out first the data of the first register of the bank with the MSB first.

2.0 LIS1R02 REGISTERS

The registers are grouped into two banks. The following table summarizes their mapping.

Address

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Reg. Bank 0

FIFO_Low

not used

FIFO_High

not used

CTRL_Reg1

CTRL_Reg2

PLL_PRESC_MULT

PLL_MULT

IIR_A0

IIR_A1

IIR_A2

IIR_B1

IIR_B2

IIR_SIGN_BIT

DSC_Reg

MISC_Reg

Reg. Bank 1

FIFO_Low

not used

FIFO_High

not used

CTRL_Reg1

CTRL_Reg2

FLASH_Reg1

FLASH_Reg2

GAIN_Low

GAIN_High

OFFSET_Low

OFFSET_High

CURR_BANDGAP

BAND_CSACT_Reg

CS_TRIM

MISC_Reg

2.1 Registers Bank 0

AD(3:0) = 0100 CTRL_Reg1

This is the first control register. It has 8 bit whose function is summarized below.

Note: x means don't care value.

Note: default value after Power On Reset is 0100 0000

1xxx xxxx Chip in Power Down mode

xx00 xxxx Clock from CLK pin

xx01 xxxx Clock derived from the internal oscillator

xx10 xxxx Clock from the PLL locking on CLK_in

xx11 xxxx Clock from the PLL locking on FIFO_Low reading

xxxx 1xxx Internal Oscillator in Power Down mode

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