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SP6652EU(2004) データシートの表示(PDF) - Signal Processing Technologies

部品番号
コンポーネント説明
メーカー
SP6652EU
(Rev.:2004)
Sipex
Signal Processing Technologies Sipex
SP6652EU Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Top View
D
D/2
E/2
E
Pin 1 identifier to be located within this shaded area.
Terminal #1 Index Area (D/2 * E/2)
PACKAGE: 10 PIN DFN
Bottom View
e
b
12
E2
K
L
D2
A
A1
A3
Side View
DIMENSIONS
Minimum/Maximum
(mm)
10 Pin DFN
(JEDEC MO-229,
VEED-5 VARIATION)
COMMON HEIGHT DIMENSION
SYMBOL
MIN NOM MAX
A
0.80 0.90 1.00
A1
0 0.02 0.05
A3
0.20 REF
b
0.18 0.25 0.30
D
3.00 BSC
D2
2.20 - 2.70
e
0.50 PITCH
E
3.00 BSC
E2
1.40 - 1.75
K
0.20 - -
L
0.30 0.40 0.50
10 PIN DFN
Date:5/25/04
SP6652 1A, High Efficiency, High Frequency Current Mode PWM Buck Regulator
10
© Copyright 2004 Sipex Corporation

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