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SP9502JN データシートの表示(PDF) - Signal Processing Technologies

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SP9502JN
Sipex
Signal Processing Technologies Sipex
SP9502JN Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device
at these or any other above those indicated in the operation
sections of the specifications below is not implied. Exposure to
absolute maximum rating conditions for extended periods of time
may affect reliability.
VDD - GND ..................................................................... -0.3V,+6.0V
VSS - GND .................................................................... +0.3V, -6.0V
V - V -0.3V, +12.0V DD
SS ......................................................................................................................
VREF ..................................................................................... VSS, VDD
DIN ....................................................................................... VSS, VDD
Power Dissipation
Plastic DIP .......................................................................... 375mW
(derate 7mW/°C above +70°C)
Small Outline ...................................................................... 375mW
(derate 7mW/˚C above +70˚C)
SPECIFICATIONS
(Typical at 25˚C, TMIN TATMAX; VDD = +5V, VSS = -5V, VREF = +3V; CMOS logic level digital inputs; specifications apply to all grades unless otherwise noted.)
PARAMETER
MIN. TYP. MAX.
UNITS
CONDITIONS
DIGITAL INPUTS
Logic Levels
VIH
VIL
4 Quad, Bipolar Coding
REFERENCE INPUT
Voltage Range
Input Resistance
2.4
0.8
Offset Binary
+3
+4.5
6
8.8
Volts
Volts
Volts
k
Note 5
DIN = 1877, code dependent
ANALOG OUTPUT
Gain
-K
-J
Initial Offset Bipolar
Voltage Range Bipolar
Output Current
STATIC PERFORMANCE
Resolution
Integral Linearity
-K
-J
Differential Linearity
-K
-J
Monotonicity
DYNAMIC PERFORMANCE
Settling Time
Small Signal
Full Scale
Slew Rate
Multiplying Bandwidth
+0.5 +2.0
+1.0 +4.0
+1.0 +5.0
+0.25 +3.0
+3.0 +4.5
+5.0
+0.5
12
+0.25 +0.5
+0.5 +1.0
+0.5 +3.0
+0.25 +0.75
+0.25 +1.0
Guaranteed
0.5
4
4
2
LSB
LSB
LSB
LSB
Volts
mA
mA
Bits
LSB
LSB
LSB
LSB
LSB
VREF = ±3V; Note 3
VREF = ±3V; Note 3
VREF = ±4.5V; Note 3
DIN = 2,048
VREF = ±3V
VREF = ±4.5V
VREF = ±3V; Note 3
VREF = ±3V; Note 3
VREF = ±4.5V; Note 3
µs
µs
V/µs
MHz
to 0.012%
to 0.012%
SP9502DS/02
SP9502 Dual, 12-Bit, Voltage Output D/A Converter
2
© Copyright 1999 Sipex Corporation

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