BSP3505D データシートの表示（PDF） - Micronas
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BSP3505D Datasheet PDF : 40 Pages
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BSP 3505D
PRELIMINARY DATA SHEET
Contents
Page
Section Title
4
1.
Introduction
4
1.1.
BSP 3505D Integrated Functions
4
1.2.
Features of the DSP-Section
4
1.3.
Features of the Analog Section
5
2.
Architecture of the BSP 3505D
5
2.1.
Analog Section and SCART Switching Facilities
5
2.1.1.
Standby Mode
6
2.2.
BSP 3505DAudio Baseband Processing
6
2.3.
Clock and Crystal Specifications
6
2.4.
Digital Control Output Pins
7
3.
I2C Bus Interface: Device and Subaddresses
8
3.1.
Protocol Description
9
3.2.
Proposal for BSP 3505D I2C Telegrams
9
3.2.1.
Symbols
9
3.2.2.
Write Telegrams
9
3.2.3.
Read Telegrams
9
3.2.4.
Examples
10
3.3.
Start Up Sequence: Power Up and I2C-Controlling
11
4.
Programming the BSP 3505D
11
4.1.
Register ‘MODE_REG’
12
4.2.
DSP Write Registers: Table and Addresses
12
4.3.
DSP Read Registers: Table and Addresses
13
4.4.
DSP Write Registers: Functions and Values
13
4.4.1.
Volume Loudspeaker Channel
14
4.4.2.
Balance Loudspeaker Channel
14
4.4.3.
Bass Loudspeaker Channel
15
4.4.4.
Treble Loudspeaker Channel
15
4.4.5.
Loudness Loudspeaker Channel
16
4.4.6.
Spatial Effects Loudspeaker Channel
17
4.4.7.
Volume SCART1
17
4.4.8.
Channel Source Modes
17
4.4.9.
Channel Matrix Modes
17
4.4.10.
SCART Prescale
18
4.4.11.
Definition of Digital Control Output Pins
18
4.4.12.
Definition of SCART-Switching Facilities
18
4.4.13.
Beeper
19
4.4.14.
Automatic Volume Correction (AVC)
19
4.5.
DSP Read Registers: Functions and Values
19
4.5.1.
Quasi-Peak Detector
20
4.5.2.
BSP Hardware Version Code
20
4.5.3.
BSP Major Revision Code
20
4.5.4.
BSP Product Code
20
4.5.5.
BSP ROM Version Code
2
Micronas
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