SST25VF016B データシートの表示（PDF） - Silicon Storage Technology

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SST25VF016B

16 Mbit SPI Serial Flash

Silicon Storage Technology 

16 Mbit SPI Serial Flash

SST25VF016B

Read (25 MHz)

The Read instruction, 03H, supports up to 25 MHz Read.

The device outputs the data starting from the specified

address location. The data output stream is continuous

through all addresses until terminated by a low to high tran-

sition on CE#. The internal address pointer will automati-

cally increment until the highest memory address is

reached. Once the highest memory address is reached,

the address pointer will automatically increment to the

Data Sheet

beginning (wrap-around) of the address space. Once the

data from address location 1FFFFFH has been read, the

next output will be from address location 000000H.

The Read instruction is initiated by executing an 8-bit com-

mand, 03H, followed by address bits [A23-A0]. CE# must

remain active low for the duration of the Read cycle. See

Figure 5 for the Read sequence.

CE#

MODE 3

SCK MODE 0

0 1 2345 6 78

15 16

23 24 31 32 39 40 47 48 55 56 63 64 70

SI

03

ADD. ADD. ADD.

MSB

MSB

HIGH IMPEDANCE

SO

N

DOUT

N+1

DOUT

N+2

DOUT

N+3

DOUT

N+4

DOUT

MSB

1271 ReadSeq.0

FIGURE 5: Read Sequence

©2008 Silicon Storage Technology, Inc.

9

S71271-03-000

9/08

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