SST32HF802-70-4C-L3K データシートの表示（PDF） - Silicon Storage Technology
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SST32HF802-70-4C-L3K Datasheet PDF : 30 Pages
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Multi-Purpose Flash (MPF) + SRAM ComboMemory
SST32HF202 / SST32HF402 / SST32HF802
Data Sheet
TABLE 5: DC OPERATING CHARACTERISTICS (VDD = VDDF AND VDDS = 2.7-3.3V)
Limits
Symbol Parameter
Min Max Units Test Conditions
IDD
Power Supply Current
Read
Flash
Address input=VILT/VIHT, at f=5 MHz,
VDD=VDD Max, all DQs open
OE#=VIL, WE#=VIH
30 mA BEF#=VIL, BES#=VIH
ISB
ILI
ILO
VIL
VIH
VIHC
VOLF
VOHF
VOLS
VOHS
SRAM
Concurrent Operation
Write
Flash
SRAM
Standby VDD Current
SST32HF202/402
SST32HF802
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Flash Output Low Voltage
Flash Output High Voltage
Output Low Voltage
Output High Voltage
30 mA BEF#=VIH, BES#=VIL
55 mA BEF#=VIH, BES#=VIL
WE#=VIL
30 mA BEF#=VIL, BES#=VIH, OE#=VIH
30 mA BEF#=VIH, BES#=VIL
30
40
1
10
0.8
0.7 VDD
VDD-0.3
0.2
VDD-0.2
0.4
2.2
µA VDD=VDD Max, BEF#=BES#=VIHC
µA VDD=VDD Max, BEF#=BES#=VIHC
µA VIN=GND to VDD, VDD=VDD Max
µA VOUT=GND to VDD, VDD=VDD Max
V VDD=VDD Min
V VDD=VDD Max
V VDD=VDD Max
V IOL=100 µA, VDD=VDD Min
V IOH=-100 µA, VDD=VDD Min
V IOL=1 mA, VDD=VDD Min
V IOH=-500 µA, VDD=VDD Min
T5.7 1209
TABLE 6: RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol
Parameter
Minimum
Units
TPU-READ1
TPU-WRITE1
Power-up to Read Operation
Power-up to Program/Erase Operation
100
µs
100
µs
T6.0 1209
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 7: CAPACITANCE (TA = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
Maximum
CI/O1
I/O Pin Capacitance
VI/O = 0V
24 pF
CIN1
Input Capacitance
VIN = 0V
12 pF
T7.0 1209
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 8: FLASH RELIABILITY CHARACTERISTICS
Symbol
Parameter
Minimum Specification Units Test Method
NEND1
Endurance
10,000
Cycles JEDEC Standard A117
TDR1
Data Retention
100
Years JEDEC Standard A103
ILTH1
Latch Up
100 + IDD
mA JEDEC Standard 78
T8.0 1209
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2005 Silicon Storage Technology, Inc.
10
S71209-06-000
5/05
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