SST36VF1601G データシートの表示（PDF） - Silicon Storage Technology

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SST36VF1601G

16 Mbit (x8/x16) Concurrent SuperFlash

Silicon Storage Technology 

Data Sheet

16 Mbit Concurrent SuperFlash

SST36VF1601G / SST36VF1602G

ADDRESS A19-0

CE#

OE#

TOEH

TCE

TOE

TOES

WE#

DQ7

FIGURE 13: Toggle Bit Timing Diagram

TWO READ CYCLES

WITH SAME OUTPUTS

TBR

VALID DATA

1342 F09.1

ADDRESSES

SIX-BYTE CODE FOR CHIP-ERASE

555

2AA

555

555

2AA

555

TSCE

CE#

OE#

WE#

RY/BY#

TOEH

TBY

TBR

DQ15-0

XXAA XX55

XX80 XXAA XX55

XX10

VALID

1342 F10.1

Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchangeable

as long as minimum timings are met. See Table 15 on page 19.

X can be VL or VIH, but not other value.

FIGURE 14: WE# Controlled Chip-Erase Timing Diagram

©2006 Silicon Storage Technology, Inc.

22

S71342-00-000

12/06

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