SST36VF1601G データシートの表示（PDF） - Silicon Storage Technology
部品番号
コンポーネント説明
メーカー
SST36VF1601G Datasheet PDF : 36 Pages
| |||
16 Mbit Concurrent SuperFlash
SST36VF1601G / SST36VF1602G
Sector-Erase/Block-Erase Operation
The Sector- or Block- Erase operation allows the system to
erase the device on a sector-by-sector (or block-by-block)
basis. The SST36VF160xG offer both Sector-Erase and
Block-Erase operations.
The sector architecture is based on a uniform sector size of
2 KWord. The Sector-Erase operation is initiated by execut-
ing a six-byte command sequence with a Sector-Erase
command (50H) and sector address (SA) in the last bus
cycle.
The Block-Erase mode is based on a uniform block size of
32 KWord. Block-Erase is initiated by executing a six-byte
command sequence with Block-Erase command (30H) and
block address (BA) in the last bus cycle. The sector or block
address is latched on the falling edge of the sixth WE#
pulse, while the command (50H or 30H) is latched on the
rising edge of the sixth WE# pulse. The internal Erase oper-
ation begins after the sixth WE# pulse.
Any commands issued during the Sector- or Block-Erase
operation are ignored except Erase-Suspend and Erase-
Resume. See Figures 15 and 16 for timing waveforms.
Chip-Erase Operation
The SST36VF1601G and SST36VF1602G provide a
Chip-Erase operation, which erases the entire memory
array to the ‘1’ state. This operation is useful when the
entire device must be quickly erased.
The Chip-Erase operation is initiated by executing a six-
byte command sequence with Chip-Erase command (10H)
at address 555H in the last byte sequence. The Erase
operation begins with the rising edge of the sixth WE# or
CE#, whichever occurs first. During the Erase operation,
the only valid Read is Toggle Bit or Data# Polling. Any com-
mands issued during the Chip-Erase operation are
ignored. See Table 6 for the command sequence, Figure
14 for timing diagram, and Figure 29 for the flowchart.
When WP# is low, any attempt to Chip-Erase will be
ignored.
Data Sheet
Erase-Suspend/Erase-Resume Operations
The Erase-Suspend operation temporarily suspends a
Sector- or Block-Erase operation thus allowing data to be
read or programmed into any sector or block that is not
engaged in an Erase operation. The operation is executed
by issuing a one-byte command sequence with Erase-Sus-
pend command (B0H). The device automatically enters
read mode no more than 10 µs after the Erase-Suspend
command had been issued. (TES maximum latency equals
10 µs.) Valid data can be read from any sector or block that
is not suspended from an Erase operation. Reading at
address location within erase-suspended sectors/blocks
will output DQ2 toggling and DQ6 at ‘1’. While in Erase-Sus-
pend mode, a Program operation is allowed except for the
sector or block selected for Erase-Suspend.
To resume a suspended Sector-Erase or Block-Erase
operation, the system must issue an Erase-Resume com-
mand. The operation is executed by issuing a one-byte
command sequence with Erase Resume command (30H)
at any address in the one-byte sequence.
Write Operation Status Detection
To optimize the system Write cycle time, the
SST36VF160xG provide two software means to detect the
completion of a Write (Program or Erase) cycle The soft-
ware detection includes two status bits: Data# Polling
(DQ7) and Toggle Bit (DQ6). The End-of-Write detection
mode is enabled after the rising edge of WE#, which ini-
tiates the internal Program or Erase operation.
The actual completion of the nonvolatile write is asyn-
chronous with the system. Therefore, Data# Polling or
Toggle Bit maybe be read concurrent with the completion
of the write cycle. If this occurs, the system may possibly
get an incorrect result from the status detection process.
For example, valid data may appear to conflict with either
DQ7 or DQ6. To prevent false results, upon detection of
failures, the software routine should loop to read the
accessed location an additional two times. If both reads
are valid, then the device has completed the Write cycle,
otherwise the failure is valid.
©2006 Silicon Storage Technology, Inc.
3
S71342-00-000
12/06
Share Link: 