SST39SF010A-45-4C-U1 データシートの表示（PDF） - Silicon Storage Technology

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SST39SF010A-45-4C-U1

1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39SF010A / SST39SF020A / SST39SF040

Preliminary Specification

ADDRESS AMS-0

CE#

TAS

OE#

WE#

DQ7-0

5555

TAH

TCP

2AAA

TCPH

5555

TCH

TCS

AA

55

A0

ADDR

INTERNAL PROGRAM OPERATION STARTS

TBP

TDH

TDS

DATA

SW0

SW1

SW2

BYTE

(ADDR/DATA)

Note: AMS = Most significant address

AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040

FIGURE 6: CE# CONTROLLED PROGRAM CYCLE TIMING DIAGRAM

398 ILL F05.1

ADDRESS AMS-0

CE#

OE#

WE#

TOEH

TCE

TOE

DQ7

D

D#

D#

Note: AMS = Most significant address

AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040

FIGURE 7: DATA# POLLING TIMING DIAGRAM

©2001 Silicon Storage Technology, Inc.

11

TOES

D

398 ILL F06.1

S71147-02-000 5/01 398

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