SST39VF088 データシートの表示（PDF） - Silicon Storage Technology

部品番号

コンポーネント説明

メーカー

SST39VF088

8 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

8 Mbit Multi-Purpose Flash

SST39VF088

Preliminary Specifications

TABLE 5: DC OPERATING CHARACTERISTICS VDD = 2.7-3.6V1

Limits

Symbol Parameter

Min

Max

Units Test Conditions

IDD

Power Supply Current

Address input=VILT/VIHT, at f=5 MHz,

VDD=VDD Max

Read2

15

mA

CE#=VIL, OE#=WE#=VIH, all I/Os open

Program and Erase

30

mA

CE#=WE#=VIL, OE#=VIH

ISB

Standby VDD Current

20

µA

CE#=VIHC, VDD=VDD Max

ILI

Input Leakage Current

1

µA

VIN=GND to VDD, VDD=VDD Max

ILO

Output Leakage Current

10

µA

VOUT=GND to VDD, VDD=VDD Max

VIL

Input Low Voltage

0.8

V

VDD=VDD Min

VILC

Input Low Voltage (CMOS)

0.3

V

VDD=VDD Max

VIH

Input High Voltage

0.7VDD

V

VDD=VDD Max

VIHC

Input High Voltage (CMOS)

VDD-0.3

V

VDD=VDD Max

VOL

Output Low Voltage

0.2

V

IOL=100 µA, VDD=VDD Min

VOH

Output High Voltage

VDD-0.2

V

IOH=-100 µA, VDD=VDD Min

1. Typical conditions for the Active Current shown on the front page of the data sheet are average values at 25°C

(room temperature), and VDD = 3V. Not 100% tested.

2. The IDD current listed is typically less than 2mA/MHz, with OE# at VIH. Typical VDD is 3V.

T5.1 1227

TABLE 6: RECOMMENDED SYSTEM POWER-UP TIMINGS

Symbol

Parameter

Minimum

Units

TPU-READ1

TPU-WRITE1

Power-up to Read Operation

Power-up to Program/Erase Operation

100

µs

100

µs

T6.0 1227

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

TABLE 7: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)

Parameter Description

Test Condition

Maximum

CI/O1

I/O Pin Capacitance

VI/O = 0V

12 pF

CIN1

Input Capacitance

VIN = 0V

6 pF

T7.0 1227

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

TABLE 8: RELIABILITY CHARACTERISTICS

Symbol

Parameter

Minimum Specification

Units

Test Method

NEND1,2

Endurance

10,000

Cycles

JEDEC Standard A117

TDR1

Data Retention

100

Years

JEDEC Standard A103

ILTH1

Latch Up

100 + IDD

mA

JEDEC Standard 78

T8.0 1227

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

2. NEND endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a

higher minimum specification.

©2003 Silicon Storage Technology, Inc.

8

S71227-04-000

11/03

Share Link: