DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

SST39VF800Q-70-4I-BK データシートの表示(PDF) - Silicon Storage Technology

部品番号
コンポーネント説明
メーカー
SST39VF800Q-70-4I-BK
SST
Silicon Storage Technology SST
SST39VF800Q-70-4I-BK Datasheet PDF : 23 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
8 Megabit Multi-Purpose Flash
SST39VF800Q / SST39VF800
Advance Information
TABLE 8: DC OPERATING CHARACTERISTICS VDD = 2.7-3.6V AND VDDQ = VDD OR 4.5V - 5.5V
Limits
Symbol Parameter
Min Max Units Test Conditions
1
IDD
Power Supply Current
Read
Program and Erase
CE#=OE#=VIL,WE#=VIH , all I/Os open,
20
mA Address input = VIL/VIH, at f=1/TRC Min.
25
mA CE#=WE#=VIL, OE#=VIH, VDD=VDD Max.
2
ISB
Standby VDD Current
10
µA
CE#=VIHC, VDD = VDD Max.
IALP
Auto Low Power Current
ILI
Input Leakage Current
10
µA
CE#=VIHC, VDD = VDD Max.
1
µA
VIN =GND to VDD, VDD = VDD Max.
3
ILO
Output Leakage Current
1
µA
VOUT =GND to VDD, VDD = VDD Max.
VIL
Input Low Voltage
0.8
V
VDD = VDD Min.
4
VILC
Input Low Voltage (CMOS) 0.3
V
VDD = VDD Max.
VIH
Input High Voltage
2.0
V
VDD = VDD Max.
VIHC
Input High Voltage (CMOS) VDD-0.3
V
VDD = VDD Max.
5
VOL
Output Low Voltage
0.4
V
IOL = 100 µA, VDD = VDD Min.
VOH
Output High Voltage
2.4
V
IOH = -100 µA, VDD = VDD Min.
6
VH
Supervoltage for A9 pin
11.4 12.6
V
CE# = OE# =VIL, WE# = VIH
IH
Supervoltage Current
for A9 pin
200
µA
CE# = OE# = VIL, WE# = VIH, A9 = VH Max.
7
343 PGM T9.1
TABLE 9: RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol
Parameter
TPU-READ(1)
TPU-WRITE(1)
Power-up to Read Operation
Power-up to Program/Erase
Operation
Minimum
100
100
8
Units
µs
µs
9
TABLE 10: CAPACITANCE (Ta = 25 °C, f=1 Mhz, other pins open)
343 PGM T10.0
10
Parameter
Description
Test Condition
Maximum
CI/O(1)
I/O Pin Capacitance
VI/O = 0V
12 pF
11
CIN(1)
Input Capacitance
VIN = 0V
6 pF
343 PGM T11.1
Note: (1) This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
12
TABLE 11: RELIABILITY CHARACTERISTICS
Symbol
Parameter
Minimum Specification
NEND(1)
TDR(1)
VZAP_HBM(1)
VZAP_MM(1)
ILTH(1)
Endurance
Data Retention
ESD Susceptibility
Human Body Model
ESD Susceptibility
Machine Model
Latch Up
10,000
100
1000
200
100 + IDD
Units
Cycles
Years
Volts
Volts
mA
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard A114
JEDEC Standard A115
JEDEC Standard 78
13
14
15
343 PGM T12.1
16
Note: (1) This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
© 1999 Silicon Storage Technology, Inc.
9
343-04 2/99

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]