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ST10F167(1997) データシートの表示(PDF) - STMicroelectronics

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ST10F167
(Rev.:1997)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
ST10F167 Datasheet PDF : 69 Pages
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ST10F167
Table 2.1
Symbol
PORT1:
P1L.0 –
P1L.7,
P1H.0 -
P1H.7
XTAL1
XTAL2
RSTIN
RSTOUT
NMI
VAREF
VAGND
VPP
Pin Definitions and Functions (cont’d)
Pin
Number
118 –
125
128 –
135
Input (I)
Output
(O)
I/O
132
I
133
I
134
I
135
I
138
I
137
O
140
I
141
O
142
I
37
-
38
-
84
-
Function
PORT1 consists of the two 8-bit bidirectional I/O ports P1L and
P1H. It is bit-wise programmable for input or output via direction
bits. For a pin configured as input, the output driver is put into high-
impedance state. PORT1 is used as the 16-bit address bus (A) in
demultiplexed bus modes and also after switching from a demul-
tiplexed bus mode to a multiplexed bus mode.
The following PORT1 pins also serve for alternate functions:
P1H.4 CC24IO CAPCOM2: CC24 Capture Input
P1H.5 CC25IO CAPCOM2: CC25 Capture Input
P1H.6 CC26IO CAPCOM2: CC26 Capture Input
P1H.7 CC27IO CAPCOM2: CC27 Capture Input
XTAL1: Input to the oscillator amplifier and input to the internal
clock generator
XTAL2: Output of the oscillator amplifier circuit.
To clock the device from an external source, drive XTAL1, while
leaving XTAL2 unconnected. Minimum and maximum high/low
and rise/fall times specified in the AC Characteristics must be ob-
served.
Reset Input with Schmitt-Trigger characteristics. A low level at this
pin for a specified duration while the oscillator is running resets the
ST10F167. An internal pullup resistor permits power-on reset us-
ing only a capacitor connected to VSS.
Internal Reset Indication Output. This pin is set to a low level when
the part is executing, either a hardware, a software or a watchdog
timer reset. RSTOUT remains low until the EINIT (end of initializa-
tion) instruction is executed.
Non-Maskable Interrupt Input. A high to low transition at this pin
causes the CPU to vector to the NMI trap routine. When the
PWRDN (power down) instruction is executed, the NMI pin must
be low in order to force the ST10F167 to go into power down
mode. If NMI is high, when PWRDN is executed, the part will con-
tinue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Reference voltage for the A/D converter.
Reference ground for the A/D converter.
Flash programming voltage. This pin accepts the programming
voltage for the on-chip flash EPROM of the ST10F167.
10/69
3

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