ST8012 データシートの表示（PDF） - Sitronix Technology Co., Ltd.
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ST8012 Datasheet PDF : 47 Pages
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ST8012
When set to VSS level "L", the LCD drive output pins (COMSEG0-COMSEG119) are set to level Vss.
When set to "L", the contents of the line latch are reset, but the display data are read in the
data latch regardless of the condition of XDISPOFF. When the XDISPOFF function is canceled,
the driver outputs non-select level (V2 or V3), then outputs the contents of the data latch at the next
falling edge of the LP. At that time, if XDISPOFF removal time does not correspond to what is shown
in AC characteristics, it cannot output the reading data correctly.
Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.
AC signal input pin for LCD drive waveform
The input signal is level-shifted from logic voltage level to LCD drive voltage level, and controls the
LCD drive circuit.
FR
Normally it inputs a frame inversion signal.
The LCD drive output pins' output voltage levels can be set using the line latch output signal and the
FR signal.
Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.
Interface Mode selection pin
P/S
When P/S is “H” then parallel data input mode.
When P/S is “L” the serial data input mode,
Input/output pins for chip selection.
AT segment mode:
When L/R input is at VSS level "L", ElO1 is set for output, and EIO2 is set for input(connect to Vss).
ElO1, EIO2
When L/R input is at VDD level "H", ElO1 is set for input(connect to Vss), and EIO2 is set for output.
During output, set to "H" while LP • XCK is "H" and after 120 bits of data have been read, set
to "L” for one cycle (from falling edge to failing edge of XCK), after which it returns to "H".
During input, the chip is selected while El is set to "L" after the LP signal is input. The chip is
non-selected after 120 bits of data have been read.
LCD drive output pins
COMSEG0
Corresponding directly to each bit of the data latch, one level (V0, V2 ,V3,Vss) is selected and output.
–COMSEG119
Table of truth values is shown in "TRUTH TABLE" in Functional Operations.
CAP1- DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
CAP1+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1- terminal.
CAP2- DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
CAP2+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
CAP3+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1- terminal.
CAP4+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
CAP5+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1- terminal.
VOUT DC/DC voltage converter. Connect a capacitor between this terminal and VSS.
XCS
This is the command mode select pin. When XCS=”L” then write command to the LCD, when not
used the command mode then must fixed to Vdd . See Figure1
SID
The command data, when not used the command mode then must fixed to Vdd. See Figure1
SCLK The serial clock input, when not used the command mode then must fixed to Vdd. See Figure1
V1.6
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2004/09/08
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