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STK415-140-E データシートの表示(PDF) - SANYO -> Panasonic

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STK415-140-E Datasheet PDF : 12 Pages
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STK415-140-E
Specifications
Absolute maximum ratings at Ta=25°C (excluding rated temperature items), Tc=25°C unless otherwise specified
Parameter
VH maximum quiescent supply voltage 1
VH maximum supply voltage 2
VH maximum supply voltage 3
VL maximum quiescent supply voltage 1
VL maximum supply voltage 2
VL maximum supply voltage 3
Maximum voltage between VH and VL *4
Standby pin maximum voltage
Thermal resistance
Junction temperature
IC substrate operating temperature
Storage temperature
Allowable load shorted time
*3
Symbol
VH max (1)
VH max (2)
VH max (3)
VL max (1)
VL max (2)
VL max (3)
VH-VL max
Vst max
θj-c
Tj max
Tc max
Tstg
ts
When no signal
RL6Ω
RL4Ω
When no signal
RL6Ω
RL4Ω
No loading
Conditions
Per power transistor
Both the Tj max and Tc max conditions must be met.
VH=±52V, VL=±32V, RL=6Ω, f=50Hz,
PO=120W, 1-channel active
Ratings
±80
±78
±60
±51
±48
±36
60
-0.3 to +5.5
1.5
150
125
-30 to +125
0.3
Unit
V
V
V
V
V
V
V
V
°C/W
°C
°C
°C
s
Electrical Characteristics at Tc=25°C, RL=8Ω (non-inductive load), Rg=600Ω, VG=40dB, VZ=15V
Conditions *1
Ratings
Parameter
Symbol
V
(V)
f
PO
THD
(Hz)
(W)
(%)
unit
min
typ
max
Output power
PO (1)
VH
±52
VL
20 to 20k
±32
0.8
120
W
PO (2)
VH
±42
VL
±28
1k
0.8
RL=4Ω
120
Total harmonic distortion THD
VH
±52
VL
20 to 20k 120
±32
0.4
%
Frequency characteristics fL, fH
VH
±52
VL
±32
1.0
+0 -3dB
20 to 50k
Hz
Input impedance
ri
VH
±52
VL
±32
1k
1.0
55
kΩ
Output noise voltage *2 VNO
VH
±58
VL
±38
Rg=2.2kΩ
1.0 mVrms
Quiescent current
ICCO
VH
±58
VL
±38
RL=
30
mA
100
Output neutral voltage
VN
VH
±58
VL
±38
-70
0
+70 mV
Pin 17 voltage when
VST ON
VH
±52
standby ON
*7
VL
±32
Standby
0
0.6
V
Pin 17 voltage when
VST OFF VH
±52
standby OFF
*7
VL
±32
Operating
2.5
3.0
V
[Remarks]
*1: Unless otherwise specified, use a constant-voltage power supply to supply power when inspections are carried out.
*2: The output noise voltage values shown are peak values read with a VTVM. However, an AC stabilized (50Hz)
power supply should be used to minimize the influence of AC primary side flicker noise on the reading.
*3: Use the designated transformer power supply circuit shown in the figure below for the measurements of allowable
load shorted time and output noise voltage.
*4: Design circuits so that (|VH|-|VL|) is always less than 40V when switching the power supply with the load connected.
*5: Set up the VL power supply with an offset voltage at power supply switching (VL-VO) of about 8V as an initial target.
*6: Please connect –Pre VCC pin (#5 pin) with the stable minimum voltage and connect so that current does not flow in
by reverse bias.
*7: Use the standby pin (pin 17) so that the applied voltage never exceeds the maximum rating.
The power amplifier is turned on by applying +2.5V to +5.5V to the standby pin (pin 17).
*8: Thermal design must be implemented based on the conditions under which the customer’s end products are
expected to operate on the market.
*9: A thermoplastic adhesive resin is used for this hybrid IC.
No. A1501-2/12

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