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STLC30R81 データシートの表示(PDF) - STMicroelectronics

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STLC30R81 Datasheet PDF : 17 Pages
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STLC30R81
Figure 9. Logic interface Input Timing
Min
t1 100ns
t2 100ns
t3 500ns
t4 100ns
t5 100ns
t6 500ns
t1
t3
t2
CS
D0/D1/D2/D3
DET/GDK
t4
t6
t5
EXTERNAL COMPONENTS
Table 7. External Components
Name
RREF
CSVR
CVCC
CVB1
CVB2
RD
CRT
CAC
RS
ZAC
ZA
ZB
CCOMP
RPT1
RPT2
RPR1
RPR2
RLIM
RTH*
CREV
CH
LCP15xx
RLPCK
D1
D2
D3
DS1 (**)
Function
Internal current programming resistor
Battery ripple rejection capacitance
Power supply filter
Battery supply filter
Battery supply filter
Ring Trip threshold setting resistor
Ground Key capacitance
AC/DC splitter Capacitance
Protection resistor image
2 Wire AC impedance
SLIC impedance balancing network
Line impedance balancing network
AC feedback compensation Capacitance
Line series Resistor
Line series Resistor
Line series Resistor
Line series Resistor
Current limiting setting resistor
OFF/HOOK detection threshold setting
resistor
Polarity/reversal/transition time
programming
Trans-Hybrid Freq. Comp Cap
Loop Back resistor
Over voltage protection
Over voltage protection
Over voltage protection
Power Up sequencer
Formula
IREF = 0.6/RREF
CSVR = 1/(2π ⋅ /P1.3M)
RD=100/IRT(*); 2K<RD<5K
CRT = (25/Fring) 470nF
CAC = 1/(2π⋅ /sp/RD)
Rs = 25*2RP
ZAC = 25[ZS-2RP]
ZA= 25 · ZS
ZB = 25 · ZL
CCOMP = 2 / (2π ⋅ /o100·RP] )
30
15
30
15
RLIM = 103·(0.6)/ILIM
RTH = 200·[(0.6)/ITH]
23.7Kto 86.6K
CREV = K/(VTR/T); K= 1/3750
Typ. Value
30.1K±1%
100nF ±10% 100V @ 1.22Hz
100nF±20%
100nF±20% 100V
100nF±20% 100V
4.12KΩ±1% @IRTH =24mA
470nF±20% 6V @25Hz
10µF ±20% 15V @/sp = 10Hz
2.5K±1%
12.5K±1%
15K±1%
15K±1%
220pF ±20% @ /o = 250KHz
30- 1/4W±1%
20
30- 1/4W±1%
20
26K±1%
26.1K±1%
47nF for 5.67V/ms
CH=Ccomp
220pF ±20%
5001.5W ±20%
1N4148
1N4148
1N4148
BAT 49X
(*) IRTILIM+10mA. The line drivers have output current limitation correspond to ILIM during the Ringing mode.
(**) Alternative to a controlled power up sequence
10/17

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