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SY100ELT25ZCTR データシートの表示(PDF) - Micrel

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SY100ELT25ZCTR Datasheet PDF : 6 Pages
1 2 3 4 5 6
Micrel, Inc.
FEATURES
s 2.6ns typical propagation delay
s Differential ECL inputs
s 24mA TTL outputs
s Flow-through pinouts
s Available in 8-pin SOIC package
DIFFERENTIAL
ECL-to-TTL TRANSLATOR
SY100ELT25
SY100ELT25
DESCRIPTION
The SY100ELT25 is a differential ECL-to-TTL
translator. Because ECL levels are used, a +5V, –5.2V
(or –4.5V) and ground are required. The small outline 8-
lead SOIC package and the single gate of the ELT25
makes it ideal for those applications where performance,
space and low power are at a premium.
The VBB output allows the ELT25 to also be used in a
single-ended input mode. In this mode the VBB output is
tied to the D input for a non-inverting buffer or the D
input for an inverting buffer. If used the VBB pin should
be bypassed to ground via a 0.01µF capacitor.
PIN NAMES
Pin
Q
D
VCC
VEE
VBB
GND
Function
TTL Output
Differential ECL Inputs
Positive Supply
Negative Supply
Reference Output
Ground
M9999-031506
hbwhelp@micrel.com or (408) 955-1690
1
Rev.: C Amendment: /0
Issue Date: March 2006

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