SY89420V データシートの表示（PDF） - Micrel

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SY89420V

5V/3.3V DUAL PHASE LOCKED LOOP

Micrel 

Micrel

LOOP FILTER COMPONENT SELECTION

R

C

F1X

F2X

C

= 1.0µF ±10% (X7R dielectric)

R

= 560Ω ±10%

PIN NAMES

Pin

Function

I/O

F1A

Filter Pin 1A

I/O

F2A

Filter Pin 2A

I/O

RINA

Reference Input A

I

RINA

Inverted Reference Input A

I

FINA

Feedback Input A

I

FINA

Inverted Feedback Input A

I

FOUTA

Frequency Output A

O

FOUTA

Inverted Frequency Output A

O

F1B

Filter Pin 1B

I/O

F2B

Filter Pin 2B

I/O

RINB

Reference Input B

I

RINB

Inverted Reference Input B

I

FINB

Feedback Input B

I

FINB

Inverted Feedback Input B

I

FOUTB

Frequency Output B

O

FOUTB

Inverted Frequency Output B

O

VCC

VCC

—

VCCOA

Output A VCC

—

VCCOB

Output B VCC

—

VEE

VEE (0V)

—

VBB

PECL Threshold Voltage

O

VTH

TTL Threshold Voltage

O

S1A

Select Input 1A (TTL)

I

S2A

Select Input 2A (TTL)

I

S1B

Select Input 1B (TTL)

I

S2B

Select Input 2B (TTL)

I

S3B

Select Input 3B (TTL)

I

S4B

Select Input 4B (TTL)

I

ClockWorks™

SY89420V

PIN DESCRIPTION

RINA, RINA, RINB, RINB

Reference frequency inputs for loop A and B. These are

differential signal pairs and may be driven differentially or

single-ended.

FINA, FINA, FINB, FINB

Feedback frequency inputs for loop A and B. These are

differential signal pairs and may be driven differentially or

single-ended.

VBB, VTH

These are the reference voltages for use as bias for the

frequency inputs. The references are generated on-chip. VBB

is PECL compatible, while VTH is TTL compatible.

F1A, F2A, F1B, F2B

These pins are connection points for the loop filters, which are

to be provided off-chip. F1X is the high impedance side, F2X

is the reference side. The loop filter should be a first order, low

pass with a DC block. The difference voltage on these pins will

be a DC level, which is controlled by the loop feedback and

determined by the required VCO frequency.

FOUTA, FOUTA, FOUTB, FOUTB

Frequency outputs for the loops. These are differential,

positive referenced, emitter-follower signals and must be

terminated off-chip. Termination in 50 ohms is recommended.

S1A, S2A, S1B, S2B, S3B, S4B

These inputs are used to select the configuration for PLLA and

PLLB. They are compatible with standard TTL signal levels.

See the Frequency Selection Table for details of the logic.

VCC

This is the positive supply for the entire chip excluding output

buffers. It should be decoupled and present a very low

impedance in order to assure low-jitter operation.

VCCOA, VCCOB

These are the positive supplies for the output buffers. They

are constrained to be equal to the value of VCC. They should

be decoupled and present a very low impedance in order to

assure low-jitter operation.

VEE

This pin is the negative supply for the chip and is normally

connected to ground (0V).

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