SY89429A データシートの表示（PDF） - Micrel
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SY89429A Datasheet PDF : 9 Pages
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Micrel, Inc.
BLOCK DIAGRAM
+5.0V
10-25MHz
Fundamental
Crystal
or
PECL
Source
FREF
÷8
OSC
PHASE DETECTOR
PLL
V CO
÷M
400 – 800
MHz
Precision Edge®
SY89429A
PECL
÷N
FOUT
3 WIRE
INTERFACE
SERIAL
PARALLEL
INTERFACE
LOGIC
CONFIG. INFO
TEST
DETAILED BLOCK DIAGRAM
2
LOOP_FILT ER
3
LOOP_RE F
F RE F
÷8
P HASE DET EC TOR
1 0– 25 MH z
F undamental
C rystal
or
P EC L
S ource
4
X TA L1
O SC
5
X TA L2
28
S _LOAD
7
P _LOAD
27
S _DAT A
26
S _C LOCK
NOTE:
Pin numbers reference PLCC pinout.
9-B IT ÷ M
C OUNT ER
L = LAT CH
H = T rans parent
LAT CH
01
9-B IT S R
8 -> 16
9
M[8:0]
+5. 0V
1
VC C_QUIE T
+5. 0V
6, 21
VC C1
V CO
400-800
MHz
1
0
T 110
÷N
( 2, 4, 8,1 6 )
VC C_OUT
LAT CH
01
2-B IT S R
F OUT ÷ 4 — 7
S _C LOCK ÷ M — 6
LAT CH LOW — 5
F OUT — 4
÷M— 3
F RE F — 2
HIG H — 1
3-B IT S R
0
17,18
2
N[1:0]
1 9, 22
2
+5. 0V
25
24
F OUT
23
F OUT
20
T ES T
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