T431616D データシートの表示（PDF） - Taiwan Memory Technology

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コンポーネント説明

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T431616D

1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM

Taiwan Memory Technology 

tm TE

CH

T431616D/E

The read data appears on the DQs subject to the values on the LDQM/UDQM inputs two clocks earlier (i.e.

LDQM/UDQM latency is two clocks for output buffers). A read burst without the auto precharge function may

be interrupted by a subsequent Read or Write command to the same bank or the other active bank before the end

of the burst length. It may be interrupted by a BankPrecharge/ PrechargeAll command to the same bank too. The

interrupt coming from the Read command can occur on any clock cycle following a previous Read command

(refer to the following figure).

T0

T1

T2

T3

T4

T5

T6

T7

T8

CLK

COMMAND

READ A READ B

NOP

NOP

NOP

NOP

NOP

NOP

NOP

CAS# latency=1

tCK1, DQ's

CAS# latency=2

tCK2, DQ's

CAS# latency=3

tCK3, DQ's

DOUT A0 DOUT B0

DOUT B1 DOUT B2

DOUT B3

DOUT A0 DOUT B0

DOUT B1 DOUT B2

DOUT B3

DOUT A0 DOUT B0

DOUT B1 DOUT B2

DOUT B3

Read Interrupted by a Read (Burst Length = 4, CAS# Latency = 1, 2, 3)

The LDQM/UDQM inputs are used to avoid I/O contention on the DQ pins when the interrupt comes from

a Write command. The LDQM/UDQM must be asserted (HIGH) at least two clocks prior to the Write command

to suppress data-out on the DQ pins. To guarantee the DQ pins against I/O contention, a single cycle with high-

impedance on the DQ pins must occur between the last read data and the Write command (refer to the following

three figures). If the data output of the burst read occurs at the second clock of the burst write, the

LDQM/UDQM must be asserted (HIGH) at least one clock prior to the Write command to avoid internal bus

contention.

CLK

DQM

T0

T1

T2

T3

T4

T5

T6

T7

T8

COMMAND

NOP

READ A

NOP

NOP

NOP

NOP

WRITE B

NOP

DQ's

: "H" or "L"

DOUT A0

Must be Hi-Z before

the Write Command

DINB0

DINB1

Read to Write Interval (Burst Length ≥ 4, CAS# Latency = 3)

NOP

DI NB 2

TM Technology Inc. reserves the right

P. 7

to change products or specifications without notice.

Publication Date: FEB. 2007

Revision: A

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