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CXD1257AR データシートの表示(PDF) - Sony Semiconductor

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CXD1257AR
Sony
Sony Semiconductor Sony
CXD1257AR Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CXD1257AR
Pin
No.
Symbol
36 TEST2
37 MCK
38 XSHP
39 XSHD
40 Vss
41 XSP1
42 XSP2
43 XSH1
44 XSH2
45 XDL1
46 XDL2
47 BFG
48 CLP1
49 CLP2
50 CLP3
51 CLP4
52 PBLK
53 ID
54 WEN
55 GM
56 VDD
57 CL
58 PS
59 HD
60 VD
61 HTSG
62 TEST
63 XCK
64 CK
I/O
Description
I Test input. Set at Low in normal operation.
O NTSC: 1820fH/3, PAL: 1816fH/3. Output.
O Precharge level sample-and-hold pulse.
O Data sample-and-hold pulse.
— GND
O Color separation sample-and-hold pulse.
O Color separation sample-and-hold pulse.
O Switching sample-and-hold pulse.
O Switching sample-and-hold pulse.
O Delay line clock output.
O Delay line clock output.
O Pulse output for chroma modulator in encoder.
O Clamp pulse output.
I/O Clamp pulse output. When GM is set at High, standby mode switching input.
I/O Clamp pulse output. When GM is set at High, standby mode switching input.
O Clamp pulse output.
O Blanking cleaning pulse output.
O Line identification output.
O Write enable output for low-speed shutter operation.
I Low: Analog signal processing, High: Digital signal processing. (With pull-down resister)
— Power supply.
O NTSC: 910fH, PAL: 908fH. Clock output.
I
Switching for electronic shutter speed input method. (With pull-up resister)
Low: Serial input, High: Parallel input.
I Horizontal synchronizing signal input.
I Vertical synchronizing signal input. (During Low, 9H for NTSC and 7.5H for PAL)
I Control input for XSG1 and XSG2. (With pull-up resistor)
Low: XSG1, XSG2 halted, High: XSG1, XSG2 generated.
I Test input. Set at Low in normal operation. (With pull-down resister)
O NTSC: 1820fH, PAL: 1816fH. Clock output.
I NTSC: 1820fH, PAL: 1816fH. Clock input.
–3–

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