2. Memory interface
(1) Read
CXD1186CQ/CR
BA0 to 15
tSAO
XMOE
BDB0 to 7, P
tRRL
tHOA
tSDO
tHOD
Item
Address setup time (vs. XMOE ↓)
Address hold time (vs. XMOE ↑)
Data setup time (vs. XMOE ↑)
Data hold time (vs. XMOE ↑)
Low level XMOE pulse width
(2) Write
Symbol
tSAO
tHOA
tSDO
tHOD
tRRL
Min.
Tw–22
Tw–9
45
0
2 • Tw
Typ.
Max.
Unit
n
n
n
n
2•Tw+16 n
BA0 to 15
XMWR
BDB0 to 7, P
tSAW
tDWD
tWWL
tHWA
tFWD
Item
Address setup time (vs. XMWR ↓)
Address hold time (vs. XMWR ↑)
Data delay time (vs. XMWR ↓)
Data float time (vs. XMWR ↑)
Low level XMWR pulse width
Symbol Min.
Typ.
Max.
Unit
tSAW
Tw–29
n
tHWA
Tw–9
n
tDWD
0
n
tFWD
10
n
tWWL
2 • Tw
n
Where Tw=1/f.
Usually, when f=16.9344 MHz, use a RAM with access time within 120 ns.
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