TB62726AFNA データシートの表示（PDF） - Toshiba

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TB62726AFNA

TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

Toshiba 

TOSHIBA

TB62726AFNA

Terminal description

Pin No.

Pin Name

7

GND

8

SERIAL-IN

9

CLOCK

10

LATCH

Function

GND terminal for control logic

Input terminal for serial data for data shift register

Input terminal for clock for data shift on rising edge

Input terminal for data strobe When the LATCH=High-level, data is no latched. When

ithe LATCH=Low-level, data is latched.

1 to 2,

11 to 24

3

4

5

6

Constant-current output terminals

OUT 0 to 7

Input terminal for output enable.

ENABLE All outputs (OUT0 ~ OUT15 ) are turned off, when the ENABLE=High-level.

And are turned on, when the ENABLE=Low-level.

SERIAL-OUT Output terminal for serial data input on SERIAL-IN terminal

R-EXT Input terminal used to connect an external resistor.

This regulated the output current.

VDD

3.3V - 5V supply voltage terminal.

Equivalent circuit of inputs and output

1. ENABLE Terminal

R(UP)

VDD

2. LATCH Terminal

VDD

ENABLE

LATCH

GND

3. CLOCK,SERIAL-IN Terminal

VDD

GND

R(DOWN)

4. SERIAL-OUT Terminal

VDD

CLOCK,

SERIAL - IN

GND

5. OUT0 to 15 Terminal

GND

Internal data

GND

OUT 0 to 15

Parasitic Diode

SERIAL - OUT

TB62726AFNA (Ver.09) 2002, Nov. 6th page 4/11

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