TB62726AFG データシートの表示（PDF） - Toshiba

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TB62726AFG

TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic

Toshiba 

TB62726ANG/AFG

Terminal Description

Pin No.

Pin Name

Function

1

2

3

4

5 to 20

21

22

23

24

GND

GND terminal for control logic

SERIAL-IN Input terminal for serial data for data shift register

CLOCK

Input terminal for clock for data shift on rising edge

LATCH

Input terminal for data strobe

When the LATCH input is driven High, data is not latched. When it is pulled Low, data is

latched.

OUT0 to OUT15 Constant-current output terminals

ENABLE

Input terminal for output enable.

All outputs ( OUT0 to OUT15 ) are turned off, when the ENABLE terminal is driven High.

And are turned on, when the terminal is driven Low.

SERIAL-OUT Output terminal for serial data input on SERIAL-IN terminal

R-EXT

Input terminal used to connect an external resistor. This regulated the output current.

VDD

3.3-V/5-V supply voltage terminal

Equivalent Circuits for Inputs and Outputs

1. ENABLE terminal

VDD

R (UP)

ENABLE

2. LATCH terminal

VDD

LATCH

GND

3. CLOCK, SERIAL-IN terminal

VDD

GND

R (DOWN)

4. SERIAL-OUT terminal

VDD

CLOCK,

SERIAL-IN

Internal data

SERIAL-OUT

GND

GND

5. OUT0 to OUT15 terminals

GND

OUT0 to OUT15

Parasitic Diode

4

2006-06-14

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