HT9580 データシートの表示（PDF） - Holtek Semiconductor

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HT9580

Character Pager Controller

Holtek Semiconductor 

Preliminary

HT9580

IR Q

T M 0 IM S K

tim e r 0

o v e r flo w

S

tim e r 1

o v e r flo w

S

tim e r 0

o v e r flo w

S

tim e r 1 tim e r 0

o v e r flo w o v e r flo w

S

S

tim e r 0

o v e r flo w

tim e

S

M asked by

TM 0O V FG

M asked by

T M 0 IM S K

M asked by

TM 1O V FG

T M 1 IM S K

TM 0O V FG

TM 1O V FG

C le a r e d b y s o ftw a r e C le a r e d b y s o ftw a r e

C le a r e d b y s o ftw a r e

C le a r e d b y s o ftw a r e

C le a r e d b y s o ftw a r e

Timer0 and Timer1 timing diagram

Reset conditions

The HT9580 will reset the whole chip when the

following conditions are met:

· Power On

· The external RESET pin is held low for at

least 1 ms

· The WDT overflows

The input is used to reset the mC. Reset must be

held low at least 1 ms after VDD reaches oper-

ating voltage from a power down. A positive

transition on the chip reset will then cause an

initialization sequence to begin. After the sys-

tem is operating, a low on this line of at least 1

ms in duration will cause mC activity. When a

positive edge is detected, there is an initializa-

tion sequence lasting 8-clock cycles. Then the

interrupt mask flag is set, the decimal mode is

cleared and the program counter is loaded with

the restart vector from locations FFFC (low

byte) and FFFD (high byte). This is the start lo-

cation for program control. This input should be

high during normal operation.

15

April 28, 2000

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