TDA1541 データシートの表示（PDF） - Philips Electronics
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TDA1541 Datasheet PDF : 12 Pages
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Philips Semiconductors
Dual 16-bit DAC
Product specification
TDA1541
PARAMETER
Signal -to-noise ratio + THD*
Settling time to ± 1 LSB
Channel separation
Unbalance between outputs
Time delay between outputs
Power supply ripple rejection**
VDD = +5 V
VDD1 = −5 V
VDD2 = −15 V
Signal-to-noise ratio
at bipolar zero
Timing (see Figs 3, 4 and 5)
Rise time
Fall time
Bit clock cycle time
Bit clock HIGH time
Bit clock LOW time
Bit clock fall time to latch rise time
Bit clock rise time to latch fall time
Data set-up time to bit clock
Data hold time to bit clock
Data set-up time to system clock
Word select hold time to system clock
Word select set-up time to system clock
Bit clock fall time to system clock rise time
System clock rise time to bit clock fall time
System clock fall time to bit clock rise time
Bit clock rise time to system clock fall time
Latch enable LOW time
Latch enable HIGH time
SYMBOL
S/N
tcs
α
∆IFS
td
RR
RR
RR
S/N
tr
tf
tCY
tHB
tLB
tFBRL
tRBFL
tSDB
tHDB
tSDS
tHWS
tSWS
tFBRS
tRSFB
tFSRB
tRBFS
tLLE
tHLE
MIN.
90
−
80
−
−
−
−
−
−
−
−
160
48
48
0
0
32
0
32
0
32
32
32
50
0
20
32
TYP.
95
1
tbf
0,1
−
tbf
tbf
tbf
−100
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
−
−
−
0,2
1
−
−
−
−
35
35
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
UNIT
dB
µs
dB
dB
µs
dB
dB
dB
dB
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
* Signal-to-noise ratio + THD with 1 kHz full scale sinewave generated at a sampling rate of 176,4 kHz.
** Vripple = 1% of supply voltage and fripple = 100 Hz.
November 1985
8
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